(110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation

C. D. Young; K. Akarvardar; M. O. Baykan; K. Matthews; I. Ok; T. Ngai; K. W. Ang; J. Pater; Casey Smith; M. M. Hussain; P. Majhi; C. Hobbs

doi:10.1016/j.sse.2012.05.045

(110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation

C. D. Young^*, K. Akarvardar, M. O. Baykan, K. Matthews, I. Ok, T. Ngai, K. W. Ang, J. Pater, Casey Smith, M. M. Hussain, P. Majhi, C. Hobbs

^*Corresponding author for this work

Computer, Electrical and Mathematical Sciences and Engineering

Research output: Contribution to journal › Article › peer-review

27 Scopus citations

Abstract

The performance and reliability of (1 0 0) and (1 1 0) sidewall, silicon-on-insulator (SOI) FinFETs with a Hf-based gate dielectric were evaluated. Unlike the typical planar MOSFET mobility orientation dependence, (1 1 0) FinFET sidewalls do not impair electron mobility and result in good short channel performance compared to (1 0 0) FinFET sidewall devices. Hot carrier injection (HCI) degradation was also investigated with nMOS and pMOS high-κ FinFETs on both sidewall surface orientations. Impact ionization at the source, as well as at the traditional drain side, was found to enhance HCI degradation when gate voltage (V_g) = drain voltage (V_d). The degradation becomes more pronounced as the gate length decreases, with a negligible dependence on substrate orientation. However, the orientation dependence of negative bias temperature instability (NBTI) on FinFETs demonstrates that the (1 1 0) orientation is slightly worse than (1 0 0). The kinetics of ΔN_IT(t) under negative bias stress conditions suggests the interface trap density (N_IT) is generated by a mechanism similar to that in planar devices. front matter

Original language	English (US)
Pages (from-to)	2-10
Number of pages	9
Journal	Solid-State Electronics
Volume	78
DOIs	https://doi.org/10.1016/j.sse.2012.05.045
State	Published - Dec 2012

Keywords

FinFET
HCI
Mobility
NBTI
Orientation dependence
Sidewall

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1016/j.sse.2012.05.045

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title = "(110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation",

abstract = "The performance and reliability of (1 0 0) and (1 1 0) sidewall, silicon-on-insulator (SOI) FinFETs with a Hf-based gate dielectric were evaluated. Unlike the typical planar MOSFET mobility orientation dependence, (1 1 0) FinFET sidewalls do not impair electron mobility and result in good short channel performance compared to (1 0 0) FinFET sidewall devices. Hot carrier injection (HCI) degradation was also investigated with nMOS and pMOS high-κ FinFETs on both sidewall surface orientations. Impact ionization at the source, as well as at the traditional drain side, was found to enhance HCI degradation when gate voltage (Vg) = drain voltage (Vd). The degradation becomes more pronounced as the gate length decreases, with a negligible dependence on substrate orientation. However, the orientation dependence of negative bias temperature instability (NBTI) on FinFETs demonstrates that the (1 1 0) orientation is slightly worse than (1 0 0). The kinetics of ΔNIT(t) under negative bias stress conditions suggests the interface trap density (NIT) is generated by a mechanism similar to that in planar devices. front matter",

keywords = "FinFET, HCI, Mobility, NBTI, Orientation dependence, Sidewall",

author = "Young, {C. D.} and K. Akarvardar and Baykan, {M. O.} and K. Matthews and I. Ok and T. Ngai and Ang, {K. W.} and J. Pater and Casey Smith and Hussain, {M. M.} and P. Majhi and C. Hobbs",

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T2 - A performance and reliability investigation

AU - Young, C. D.

AU - Akarvardar, K.

AU - Baykan, M. O.

AU - Matthews, K.

AU - Ok, I.

AU - Ngai, T.

AU - Ang, K. W.

AU - Pater, J.

AU - Smith, Casey

AU - Hussain, M. M.

AU - Majhi, P.

AU - Hobbs, C.

PY - 2012/12

Y1 - 2012/12

N2 - The performance and reliability of (1 0 0) and (1 1 0) sidewall, silicon-on-insulator (SOI) FinFETs with a Hf-based gate dielectric were evaluated. Unlike the typical planar MOSFET mobility orientation dependence, (1 1 0) FinFET sidewalls do not impair electron mobility and result in good short channel performance compared to (1 0 0) FinFET sidewall devices. Hot carrier injection (HCI) degradation was also investigated with nMOS and pMOS high-κ FinFETs on both sidewall surface orientations. Impact ionization at the source, as well as at the traditional drain side, was found to enhance HCI degradation when gate voltage (Vg) = drain voltage (Vd). The degradation becomes more pronounced as the gate length decreases, with a negligible dependence on substrate orientation. However, the orientation dependence of negative bias temperature instability (NBTI) on FinFETs demonstrates that the (1 1 0) orientation is slightly worse than (1 0 0). The kinetics of ΔNIT(t) under negative bias stress conditions suggests the interface trap density (NIT) is generated by a mechanism similar to that in planar devices. front matter

AB - The performance and reliability of (1 0 0) and (1 1 0) sidewall, silicon-on-insulator (SOI) FinFETs with a Hf-based gate dielectric were evaluated. Unlike the typical planar MOSFET mobility orientation dependence, (1 1 0) FinFET sidewalls do not impair electron mobility and result in good short channel performance compared to (1 0 0) FinFET sidewall devices. Hot carrier injection (HCI) degradation was also investigated with nMOS and pMOS high-κ FinFETs on both sidewall surface orientations. Impact ionization at the source, as well as at the traditional drain side, was found to enhance HCI degradation when gate voltage (Vg) = drain voltage (Vd). The degradation becomes more pronounced as the gate length decreases, with a negligible dependence on substrate orientation. However, the orientation dependence of negative bias temperature instability (NBTI) on FinFETs demonstrates that the (1 1 0) orientation is slightly worse than (1 0 0). The kinetics of ΔNIT(t) under negative bias stress conditions suggests the interface trap density (NIT) is generated by a mechanism similar to that in planar devices. front matter

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KW - Mobility

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KW - Orientation dependence

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ER -

(110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation

Abstract

Keywords

ASJC Scopus subject areas

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