TY - GEN
T1 - A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations
AU - Rabie, Mohamed A.
AU - Bahgat, Ahmed B G
AU - Ramadan, Khaled S.
AU - Shobak, Hosam
AU - Nasr, Tarek Adel Hosny
AU - Abdelhafez, Mohamed R.
AU - Moustafa, Eslam M.
AU - Anis, Mohab H.
N1 - KAUST Repository Item: Exported on 2020-10-01
PY - 2011/11
Y1 - 2011/11
N2 - Semi-Dynamic Flip-Flops are widely used in state-of-art microprocessors. Moreover, scaling down traditional CMOS technology faces major challenges which rises the need for new devices for replacement. FinFET technology is a potential replacement due to similarity in both fabrication process and theory of operation to current CMOS technology. Hence, this paper presents the study of Semi Dynamic Flip Flops using both Independent gate and Tied gate FinFET devices in 32nm technology node. Furthermore, it studies the performance of these new circuits under process variations. © 2011 IEEE.
AB - Semi-Dynamic Flip-Flops are widely used in state-of-art microprocessors. Moreover, scaling down traditional CMOS technology faces major challenges which rises the need for new devices for replacement. FinFET technology is a potential replacement due to similarity in both fabrication process and theory of operation to current CMOS technology. Hence, this paper presents the study of Semi Dynamic Flip Flops using both Independent gate and Tied gate FinFET devices in 32nm technology node. Furthermore, it studies the performance of these new circuits under process variations. © 2011 IEEE.
UR - http://hdl.handle.net/10754/561914
UR - http://ieeexplore.ieee.org/document/6136674/
UR - http://www.scopus.com/inward/record.url?scp=84856876331&partnerID=8YFLogxK
U2 - 10.1109/ICEAC.2011.6136674
DO - 10.1109/ICEAC.2011.6136674
M3 - Conference contribution
SN - 9781467304658
BT - 2011 International Conference on Energy Aware Computing
PB - Institute of Electrical and Electronics Engineers (IEEE)
ER -