A lean FPGA soft processor built using a DSP block

Hui Yan Cheah; Suhaib A. Fahmy; Douglas L. Maskell; Chidamber Kulkarni

doi:10.1145/2145694.2145734

A lean FPGA soft processor built using a DSP block

Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Scopus citations

Abstract

As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage. © 2012 ACM.

Original language	English (US)
Title of host publication	ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA
Pages	237-240
Number of pages	4
DOIs	https://doi.org/10.1145/2145694.2145734
State	Published - Mar 19 2012
Externally published	Yes

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10.1145/2145694.2145734

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@inproceedings{fe0a615b996b46869f673b03a839c8b4,

title = "A lean FPGA soft processor built using a DSP block",

abstract = "As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage. {\textcopyright} 2012 ACM.",

author = "Cheah, {Hui Yan} and Fahmy, {Suhaib A.} and Maskell, {Douglas L.} and Chidamber Kulkarni",

note = "Generated from Scopus record by KAUST IRTS on 2021-03-16",

year = "2012",

month = mar,

day = "19",

doi = "10.1145/2145694.2145734",

language = "English (US)",

isbn = "9781450311557",

pages = "237--240",

booktitle = "ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA",

}

TY - GEN

T1 - A lean FPGA soft processor built using a DSP block

AU - Cheah, Hui Yan

AU - Fahmy, Suhaib A.

AU - Maskell, Douglas L.

AU - Kulkarni, Chidamber

N1 - Generated from Scopus record by KAUST IRTS on 2021-03-16

PY - 2012/3/19

Y1 - 2012/3/19

N2 - As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage. © 2012 ACM.

AB - As Field Programmable Gate Arrays (FPGAs) have advanced, the capabilities and variety of embedded resources have increased. In the last decade, signal processing has become one of the main driving applications for FPGA adoption, so FPGA vendors tailored their architectures to such applications. The resulting embedded digital signal processing (DSP) blocks have now advanced to the point of supporting a wide range of operations. In this paper, we explore how these DSP blocks can be applied to general computation. We show that the DSP48E1 blocks in Xilinx Virtex-6 devices support a wide range of standard processor instructions which can be designed into the core of a basic processor with minimal additional logic usage. © 2012 ACM.

UR - http://dl.acm.org/citation.cfm?doid=2145694.2145734

UR - http://www.scopus.com/inward/record.url?scp=84858266661&partnerID=8YFLogxK

U2 - 10.1145/2145694.2145734

DO - 10.1145/2145694.2145734

M3 - Conference contribution

SN - 9781450311557

SP - 237

EP - 240

BT - ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

ER -

A lean FPGA soft processor built using a DSP block

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