A low-power digital frequency divider for system-on-a-chip applications

Engineering

• Electric Power Utilization 100%
• Digital Frequency 100%
• Low Power Consumption 50%
• Experimental Measurement 50%
• Minor Effect 50%
• System Operation 50%
• Speed Operation 50%
• Save Power 50%
• Input Frequency 50%

Keyphrases

• Digital Frequency Divider 100%
• Divider 100%
• Minor Effect 33%
• Frequency Divider 33%
• Coarse-to-fine Architecture 33%
• Power Reduction 33%
• System Operation 33%
• High Input 33%
• Input Frequency 33%
• Complex Programmable Logic Device 33%
• Operation Speed 33%
• Coarse Block 33%