A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs

K. S. Min; C. Y. Kang; C. Park; C. S. Park; B. J. Park; J. B. Park; M. M. Hussain; Jack C. Lee; B. H. Lee; P. Kirsch; H. H. Tseng; R. Jammy; G. Y. Yeom

doi:10.1109/IEDM.2009.5424330

A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs

K. S. Min, C. Y. Kang, C. Park, C. S. Park, B. J. Park, J. B. Park, M. M. Hussain, Jack C. Lee, B. H. Lee, P. Kirsch, H. H. Tseng, R. Jammy, G. Y. Yeom

Computer, Electrical and Mathematical Sciences and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

7 Scopus citations

Abstract

For the first time, a novel damage-free neutral beamassisted atomic etching process has successfully demonstrated the removal of the residual high-k dielectric layer after gate patterning. Due to its neutralized atomic flux and chemical reaction, high etch selectivity is observed to improve device performance and reliability. This process should significantly enhance high-k/metal gate manufacturability.

Original language	English (US)
Title of host publication	2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest
Pages	17.4.1-17.4.4
DOIs	https://doi.org/10.1109/IEDM.2009.5424330
State	Published - 2009
Event	2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States Duration: Dec 7 2009 → Dec 9 2009

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Other

Other	2009 International Electron Devices Meeting, IEDM 2009
Country/Territory	United States
City	Baltimore, MD
Period	12/7/09 → 12/9/09

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1109/IEDM.2009.5424330

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Min, K. S., Kang, C. Y., Park, C., Park, C. S., Park, B. J., Park, J. B., Hussain, M. M., Lee, J. C., Lee, B. H., Kirsch, P., Tseng, H. H., Jammy, R., & Yeom, G. Y. (2009). A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs. In 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest (pp. 17.4.1-17.4.4). Article 5424330 (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2009.5424330

Min, K. S. ; Kang, C. Y. ; Park, C. et al. / A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs. 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. pp. 17.4.1-17.4.4 (Technical Digest - International Electron Devices Meeting, IEDM).

@inproceedings{99037c4d64e544718b4cdd6d94cde244,

title = "A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs",

abstract = "For the first time, a novel damage-free neutral beamassisted atomic etching process has successfully demonstrated the removal of the residual high-k dielectric layer after gate patterning. Due to its neutralized atomic flux and chemical reaction, high etch selectivity is observed to improve device performance and reliability. This process should significantly enhance high-k/metal gate manufacturability.",

author = "Min, {K. S.} and Kang, {C. Y.} and C. Park and Park, {C. S.} and Park, {B. J.} and Park, {J. B.} and Hussain, {M. M.} and Lee, {Jack C.} and Lee, {B. H.} and P. Kirsch and Tseng, {H. H.} and R. Jammy and Yeom, {G. Y.}",

year = "2009",

doi = "10.1109/IEDM.2009.5424330",

language = "English (US)",

isbn = "9781424456406",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

pages = "17.4.1--17.4.4",

booktitle = "2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest",

note = "2009 International Electron Devices Meeting, IEDM 2009 ; Conference date: 07-12-2009 Through 09-12-2009",

}

Min, KS, Kang, CY, Park, C, Park, CS, Park, BJ, Park, JB, Hussain, MM, Lee, JC, Lee, BH, Kirsch, P, Tseng, HH, Jammy, R & Yeom, GY 2009, A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs. in 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest., 5424330, Technical Digest - International Electron Devices Meeting, IEDM, pp. 17.4.1-17.4.4, 2009 International Electron Devices Meeting, IEDM 2009, Baltimore, MD, United States, 12/7/09. https://doi.org/10.1109/IEDM.2009.5424330

A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs. / Min, K. S.; Kang, C. Y.; Park, C. et al.
2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. p. 17.4.1-17.4.4 5424330 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - For the first time, a novel damage-free neutral beamassisted atomic etching process has successfully demonstrated the removal of the residual high-k dielectric layer after gate patterning. Due to its neutralized atomic flux and chemical reaction, high etch selectivity is observed to improve device performance and reliability. This process should significantly enhance high-k/metal gate manufacturability.

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Min KS, Kang CY, Park C, Park CS, Park BJ, Park JB et al. A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs. In 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. p. 17.4.1-17.4.4. 5424330. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2009.5424330

A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs

Abstract

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