A Reconfigurable Synchrophasor Synchronization Gateway & Controller Architecture for DERs

Prottay M. Adhikari, Luigi Vanfretti, Chetan Mishra, Kevin D. Jones

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations


In grid applications featuring various Distributed Energy Resources (DERs), e.g. microgrids, synchrophasor applications would require an extensive infrastructure including substantial instrumentation-hardware, communication network extensions and controller installations, like in WAMPAC systems. Thus, such overall implementation becomes cost-prohibitive. To address this issue, this paper proposes a dedicated centralized synchronization hardware to replace aggregation PDCs, and supplementary control functions into a single piece of hardware. This particular hardware is termed as Synchrophasor Synchronization Gateway & Controller (SSGC). The proposed SSGC hardware utilizes the Khorjin library to parse IEEE C37.118 data, concurrently from multiple devices, and in an embedded hard real-time (RT) computer system through a synchronization layer. Supplementary control actions, e.g. power flow control, are implemented on top of the synchronization layer. This SSGC based architecture is tested with a RT microgrid model implemented on Typhoon HIL-604 RT simulator. The communication interface between the micrgrid and the SSGC was tampered through external hardware by introducing network delays & data-drops, and its performance was analyzed.
Original languageEnglish (US)
Title of host publication2022 International Conference on Smart Grid Synchronized Measurements and Analytics (SGSMA)
ISBN (Print)9789531842822
StatePublished - Jun 29 2022
Externally publishedYes


Dive into the research topics of 'A Reconfigurable Synchrophasor Synchronization Gateway & Controller Architecture for DERs'. Together they form a unique fingerprint.

Cite this