A Self-Adaptive LSE Wirelength Model for VLSI Global Placement

Zhiping Lai, Zhipeng Huang, Zhen Chen, Jianli Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Ignoring some cells overlaps, the common objective of very large scale integration (VLSI) global placement problem is to minimize the total half-perimeter wirelength (IIPWL). Due to the non-differentiability of HPWL, the differentiable log-sum- exponential (LSK) wirelength model has been widely used to approximate IIPWL. In order to overcome the disadvantage of fixed parameter value in LSK, a self-adaptive LSK wirelength model has been presented in this paper. In each iteration of cells diffusion, the proposed wirelength model is dynamically updated according to the overflow of the circuit, and then a self-adaptive wirelength based nonlinear solver is used to solve the placement problem. Compared with a state-of-the-art LSE based placer, the experimental results show that our wirelength model not only can improve the solution quality, but also can reduce the runtime.

Original languageEnglish (US)
Title of host publication2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings
EditorsTing-Ao Tang, Fan Ye, Yu-Long Jiang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538644409
DOIs
StatePublished - Dec 5 2018
Event14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Qingdao, China
Duration: Oct 31 2018Nov 3 2018

Publication series

Name2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings

Conference

Conference14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018
Country/TerritoryChina
CityQingdao
Period10/31/1811/3/18

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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