A Self-Biased Schmitt Trigger for Low Power Applications

Mohammed Al-Qadasi, Abdullah Alshehri, Talal Al Attar, Hossein Fariborzi

Research output: Chapter in Book/Report/Conference proceedingConference contribution


In this paper, a novel technique for enhancement of hysteresis comparators is proposed. This work is based on an improved version of hysteresis comparators that used NMOS current mirrors, a PMOS load stage and a PMOS tail transistor to reduce the static power. By using an internal biasing technique for the tail transistor, we eliminated the need for one of the biasing circuits while achieving 65% lower power consumption in 0.18μ m CMOS technology, without much impact on the trip values of the hysteresis comparator.
Original languageEnglish (US)
Title of host publication2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages4
ISBN (Print)9781538695623
StatePublished - Jan 24 2019


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