In this paper, a small area and a high efficiency Single Inductor Multiple Output (SIMO) Boost converter with Digital Pulse Width Modulation (DPWM) using Interlaced Hysteresis Delay Cells (IHDCs) is proposed. This technique has advantage of small area and high efficiency from prior works. The DPWM is composed of Delay Line using Interlaced Hysteresis Delay Cells. The fabrication CMOS Process is 55nm with a standard supply voltage of 1.8V and having 2.2V and 2.4V at its output. The area occupied by the chip is about 170μm × 190μm and efficiency is 94.00%.
|Original language||English (US)|
|Title of host publication||International Conference on Electronics, Information and Communication, ICEIC 2018|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||3|
|State||Published - Apr 2 2018|