An alternative organization of defect map for defect-resilient embedded on-chip memories

Kang Yi, Shih Yang Cheng, Young Hwan Park, Fadi Kurdahi, Ahmed Eltawil

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations


In this paper, we propose the low power and low area defect map organization for the defect-resilient embedded memory system for multimedia SOCs. Existing approach to build defect map of embedded memories is based on the CAM (Content Addressable Memory) organization. But, it consumes too much power and relatively large chip area. It may be serious problem in the near future for very deep submicron technologies. Therefore, we propose the SRAM-based defect map organization to reduce both the power consumption and chip area. We also develop new defect map access algorithm to minimize the number of defect map access operations to save power. Our estimation results show the new scheme based on SRAM defect map organization consumes only 1/4 times of power at BER=1.0% compared with the power overhead by the existing approach. © Springer-Verlag Berlin Heidelberg 2007.
Original languageEnglish (US)
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
StatePublished - Dec 1 2007
Externally publishedYes


Dive into the research topics of 'An alternative organization of defect map for defect-resilient embedded on-chip memories'. Together they form a unique fingerprint.

Cite this