Abstract
Hierarchical Temporal Memory (HTM) is a biologically plausible model of the neocortex that mimics its structure and functionality. The concepts of HTM and sparse distributed patterns produced by the HTM Spatial Pooler can be useful for various applications. This chapter covers the integration of an analog backpropagation learning circuit into memristive HTM hardware for the Spatial Pooler, which is used for extraction of the meaningful features from the input patterns and conversion of these patterns into a sparse representation followed by the backpropagation learning for the pattern matching based classification. In this chapter, the way to integrate analog learning circuits to the memristive HTM is shown and the advantages of such architecture are discussed. Also, the open research problems in analog memristive HTM systems are summarized.
Original language | English (US) |
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Title of host publication | Mem-elements for Neuromorphic Circuits with Artificial Intelligence Applications |
Publisher | Elsevier |
Pages | 427-438 |
Number of pages | 12 |
ISBN (Electronic) | 9780128211847 |
DOIs | |
State | Published - Jan 1 2021 |
Keywords
- Analog circuits
- Backpropagation learning
- Hierarchical temporal memory
- Memristor
ASJC Scopus subject areas
- General Engineering
- General Arts and Humanities