Analysis and demonstration of MEM-relay power gating

Hossein Fariborzi; Matthew Spencer; Vaibhav Karkare; Jaeseok Jeon; Rhesa Nathanael; Chengcheng Wang; Fred Chen; Hei Kam; Vincent Pott; Tsu Jae King Liu; Elad Alon; Vladimir Stojanović; Dejan Marković

doi:10.1109/CICC.2010.5617380

Analysis and demonstration of MEM-relay power gating

Hossein Fariborzi^*, Matthew Spencer, Vaibhav Karkare, Jaeseok Jeon, Rhesa Nathanael, Chengcheng Wang, Fred Chen, Hei Kam, Vincent Pott, Tsu Jae King Liu, Elad Alon, Vladimir Stojanović, Dejan Marković

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

28 Scopus citations

Abstract

This paper shows that due to their negligibly low leakage, in certain applications, chips utilizing power gates built even with today's relatively large, high-voltage micro-electro-mechanical (MEM) relays can achieve lower total energy than those built with CMOS transistors. A simple analysis provides design guidelines for off-time and savings estimates as a function of technology parameters, and quantifies the further benefits of scaled relay designs. Finally, we demonstrate a relay chip successfully power-gating a CMOS chip, and show a relay-based timer suitable for self-timed operation.

Original language	English (US)
Title of host publication	IEEE Custom Integrated Circuits Conference 2010, CICC 2010
DOIs	https://doi.org/10.1109/CICC.2010.5617380
State	Published - 2010
Externally published	Yes
Event	32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010 - San Jose, CA, United States Duration: Sep 19 2010 → Sep 22 2010

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Other

Other	32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010
Country/Territory	United States
City	San Jose, CA
Period	09/19/10 → 09/22/10

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/CICC.2010.5617380

Cite this

Fariborzi, H., Spencer, M., Karkare, V., Jeon, J., Nathanael, R., Wang, C., Chen, F., Kam, H., Pott, V., Liu, T. J. K., Alon, E., Stojanović, V., & Marković, D. (2010). Analysis and demonstration of MEM-relay power gating. In IEEE Custom Integrated Circuits Conference 2010, CICC 2010 Article 5617380 (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2010.5617380

@inproceedings{874fa7ca46a04433b2baa73617a10dda,

title = "Analysis and demonstration of MEM-relay power gating",

abstract = "This paper shows that due to their negligibly low leakage, in certain applications, chips utilizing power gates built even with today's relatively large, high-voltage micro-electro-mechanical (MEM) relays can achieve lower total energy than those built with CMOS transistors. A simple analysis provides design guidelines for off-time and savings estimates as a function of technology parameters, and quantifies the further benefits of scaled relay designs. Finally, we demonstrate a relay chip successfully power-gating a CMOS chip, and show a relay-based timer suitable for self-timed operation.",

author = "Hossein Fariborzi and Matthew Spencer and Vaibhav Karkare and Jaeseok Jeon and Rhesa Nathanael and Chengcheng Wang and Fred Chen and Hei Kam and Vincent Pott and Liu, {Tsu Jae King} and Elad Alon and Vladimir Stojanovi{\'c} and Dejan Markovi{\'c}",

year = "2010",

doi = "10.1109/CICC.2010.5617380",

language = "English (US)",

isbn = "9781424457588",

series = "Proceedings of the Custom Integrated Circuits Conference",

booktitle = "IEEE Custom Integrated Circuits Conference 2010, CICC 2010",

note = "32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010 ; Conference date: 19-09-2010 Through 22-09-2010",

}

Fariborzi, H, Spencer, M, Karkare, V, Jeon, J, Nathanael, R, Wang, C, Chen, F, Kam, H, Pott, V, Liu, TJK, Alon, E, Stojanović, V & Marković, D 2010, Analysis and demonstration of MEM-relay power gating. in IEEE Custom Integrated Circuits Conference 2010, CICC 2010., 5617380, Proceedings of the Custom Integrated Circuits Conference, 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, San Jose, CA, United States, 09/19/10. https://doi.org/10.1109/CICC.2010.5617380

TY - GEN

T1 - Analysis and demonstration of MEM-relay power gating

AU - Fariborzi, Hossein

AU - Spencer, Matthew

AU - Karkare, Vaibhav

AU - Jeon, Jaeseok

AU - Nathanael, Rhesa

AU - Wang, Chengcheng

AU - Chen, Fred

AU - Kam, Hei

AU - Pott, Vincent

AU - Liu, Tsu Jae King

AU - Alon, Elad

AU - Stojanović, Vladimir

AU - Marković, Dejan

PY - 2010

Y1 - 2010

N2 - This paper shows that due to their negligibly low leakage, in certain applications, chips utilizing power gates built even with today's relatively large, high-voltage micro-electro-mechanical (MEM) relays can achieve lower total energy than those built with CMOS transistors. A simple analysis provides design guidelines for off-time and savings estimates as a function of technology parameters, and quantifies the further benefits of scaled relay designs. Finally, we demonstrate a relay chip successfully power-gating a CMOS chip, and show a relay-based timer suitable for self-timed operation.

AB - This paper shows that due to their negligibly low leakage, in certain applications, chips utilizing power gates built even with today's relatively large, high-voltage micro-electro-mechanical (MEM) relays can achieve lower total energy than those built with CMOS transistors. A simple analysis provides design guidelines for off-time and savings estimates as a function of technology parameters, and quantifies the further benefits of scaled relay designs. Finally, we demonstrate a relay chip successfully power-gating a CMOS chip, and show a relay-based timer suitable for self-timed operation.

UR - http://www.scopus.com/inward/record.url?scp=78649834507&partnerID=8YFLogxK

U2 - 10.1109/CICC.2010.5617380

DO - 10.1109/CICC.2010.5617380

M3 - Conference contribution

AN - SCOPUS:78649834507

SN - 9781424457588

T3 - Proceedings of the Custom Integrated Circuits Conference

BT - IEEE Custom Integrated Circuits Conference 2010, CICC 2010

T2 - 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010

Y2 - 19 September 2010 through 22 September 2010

ER -

Analysis and demonstration of MEM-relay power gating

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