Analysis of bus width and delay on a fully digital signum nonlinearity chaotic oscillator

Keyphrases

• 12-bit 50%
• 16-bit 50%
• 32-bit 50%
• Chaotic Oscillator 100%
• Chaotic Properties 50%
• Delay Cycle 100%
• Delay Element 50%
• External Delays 50%
• Internal Delay 50%
• Low Area 50%
• Signum Nonlinearity 100%

Engineering

• Bus Width 100%
• Delay Element 25%
• Experimental Result 25%
• Field Programmable Gate Arrays 25%
• Internals 25%
• Lyapunov Exponent 50%
• Nonlinearity 100%
• Peak Value 50%
• Phase Space 25%
• System Output 25%