Abstract
In this paper, we present an accurate method for analytical derivation of noise rejection curves (NRCs) and the associated noise susceptibility metric in the presence of variations in process and environmental parameters. The method involves modeling of the pull-up and pull-down resistances of combinational gates using approximated BSIM4 model-based device equations. Comparisons of the analytical model with circuit simulations show that the impact of parameter variations on the noise susceptibility is accurately captured by our model. The average (maximum) error associated with the noise susceptibility is found to be as low as 2.6% (6.7%). Our model can predict the noise susceptibility under parameter variations more than five orders of magnitude faster than circuit simulations, which makes it suitable for design optimization for noise robustness. © 2008 Springer Science+Business Media, LLC.
Original language | English (US) |
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Title of host publication | Analog Integrated Circuits and Signal Processing |
Pages | 27-34 |
Number of pages | 8 |
DOIs | |
State | Published - Aug 1 2009 |
Externally published | Yes |
ASJC Scopus subject areas
- Hardware and Architecture
- Signal Processing
- Surfaces, Coatings and Films