In this paper, we investigate the impact of process variations on future interconnect solutions based on single-walled carbon nanotubes (SWCNT) bundles. Leveraging an equivalent RLC model for SWCNT bundle interconnect, we calculate the relative impact of ten potential sources of variation in SWCNT bundle interconnect on resistance, capacitance, inductance, and delay. We compare the relative impact of variation for SWCNT bundles and standard copper wires as process technology scales and find that SWCNT bundle interconnect will typically have larger overall 3-sigma variations in delay. In order to achieve the same percentage variation in both SWCNT bundles and copper interconnect, the percentage variation in bundle dimensions must be reduced by 63% in 22 nm process technology. ©2007 IEEE.
|Title of host publication
|Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007
|Number of pages
|Published - Aug 28 2007