In this paper, we present accurate modeling and automated design solutions for narrow-band low noise amplifiers (LNA) in system-on-chip technology. We develop an analytical circuit model that captures the impact of integrated spiral inductor parasitics and transistor short channel effects. The LNA synthesis methodology leverages deterministic numerical nonlinear optimization techniques to simultaneously optimize both devices and passive components to yield integrated inductor values that are an order of magnitude less than those generated by traditional design techniques. When the optimized LNAs are simulated using Cadence SpectreRF, our methodology yields significant improvement in noise figure and gain over the values obtained using equation-based design techniques. © 2006 IEEE.
|Title of host publication
|Proceedings - The 6th IEEE International Workshop on System on Chip for Real Time Applications, IWSOC 2006
|Number of pages
|Published - Dec 1 2006