TY - JOUR
T1 - Cellular automata imbedded memristor-based recirculated logic in-memory computing
AU - Liu, Yanming
AU - Tian, He
AU - Wu, Fan
AU - Liu, Anhan
AU - Li, Yihao
AU - Sun, Hao
AU - Lanza, Mario
AU - Ren, Tian-Ling
N1 - KAUST Repository Item: Exported on 2023-05-19
Acknowledgements: This work was supported in part by STI 2030—Major Projects under Grant 2022ZD0209200, in part by National Natural Science Foundation of China under Grant 62022047, Grant U20A20168 and Grant 51861145202, in part by the National Key R&D Program under Grant 2016YFA0200400, in part by Fok Ying-Tong Education Foundation under Grant 171051, in part by Beijing Natural Science Foundation (M22020), in part by the Independent Research Program of Tsinghua University under Grant 2022Z11QYJ044, in part by the Tsinghua-Toyota Joint Research Fund, in part by the Daikin–Tsinghua Union Program, in part by State Key Laboratory of New Ceramic and Fine Processing Tsinghua University (No. KF202109), in part supported by JIAOT(KF202204); in part by the Opening Project of the Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, in part by the Guoqiang Institute, Tsinghua University, and in part by the Research Fund from Beijing Innovation Center for Future Chip.
PY - 2023/5/10
Y1 - 2023/5/10
N2 - Memristor-based circuits offer low hardware costs and in-memory computing, but full-memristive circuit integration for different algorithm remains limited. Cellular automata (CA) has been noticed for its well-known parallel, bio-inspired, computational characteristics. Running CA on conventional chips suffers from low parallelism and high hardware costs. Establishing dedicated hardware for CA remains elusive. We propose a recirculated logic operation scheme (RLOS) using memristive hardware and 2D transistors for CA evolution, significantly reducing hardware complexity. RLOS’s versatility supports multiple CA algorithms on a single circuit, including elementary CA rules and more complex majority classification and edge detection algorithms. Results demonstrate up to a 79-fold reduction in hardware costs compared to FPGA-based approaches. RLOS-based reservoir computing is proposed for edge computing development, boasting the lowest hardware cost (6 components/per cell) among existing implementations. This work advances efficient, low-cost CA hardware and encourages edge computing hardware exploration.
AB - Memristor-based circuits offer low hardware costs and in-memory computing, but full-memristive circuit integration for different algorithm remains limited. Cellular automata (CA) has been noticed for its well-known parallel, bio-inspired, computational characteristics. Running CA on conventional chips suffers from low parallelism and high hardware costs. Establishing dedicated hardware for CA remains elusive. We propose a recirculated logic operation scheme (RLOS) using memristive hardware and 2D transistors for CA evolution, significantly reducing hardware complexity. RLOS’s versatility supports multiple CA algorithms on a single circuit, including elementary CA rules and more complex majority classification and edge detection algorithms. Results demonstrate up to a 79-fold reduction in hardware costs compared to FPGA-based approaches. RLOS-based reservoir computing is proposed for edge computing development, boasting the lowest hardware cost (6 components/per cell) among existing implementations. This work advances efficient, low-cost CA hardware and encourages edge computing hardware exploration.
UR - http://hdl.handle.net/10754/680165
UR - https://www.nature.com/articles/s41467-023-38299-7
U2 - 10.1038/s41467-023-38299-7
DO - 10.1038/s41467-023-38299-7
M3 - Article
C2 - 37165017
SN - 2041-1723
VL - 14
JO - Nature Communications
JF - Nature Communications
IS - 1
ER -