TY - GEN
T1 - Design and Demonstration of A Compact Full Adder Using Micro-beam Resonators
AU - Ahmed, Sally
AU - Ilyas, Saad
AU - Jaber, Nizar
AU - Zou, Xuecui
AU - Li, Ren
AU - Younis, Mohammad I.
AU - Fariborzi, Hossein
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledged KAUST grant number(s): OSR-2016-CRG5-3001
Acknowledgements: This work was supported by the King Abdullah University of Science and Technology (KAUST) office of sponsored research OSR under Award No. OSR-2016-CRG5-3001.
PY - 2019/2/28
Y1 - 2019/2/28
N2 - In this work, we present the design, analytical and finite element simulations and experimental results of a full adder block using microelectromechanical resonators with multiple split electrodes. The device operation is based on modulating resonance characteristics by the digital DC inputs. The proposed full adder is implemented with only two devices, considerably less complex than standard CMOS designs which require 24 or more transistors. While the current device has a 0.1 kHz speed and energy/operation in pJ, we show that by careful optimization and scaling of the devices, the speed can be increased to MHz and the energy can be reduced to sub-fJ, which shows the potential of this technology for ultra-low power applications with moderate processing requirements. The device is fabricated using silicon-on-insulator wafer with conventional surface micromachining techniques. The implemented circuit is CMOS compatible which allows its monolithic integration with other CMOS-based circuits. The micro-beam resonator operates at room temperature and moderate pressure of 700 mTorr.
AB - In this work, we present the design, analytical and finite element simulations and experimental results of a full adder block using microelectromechanical resonators with multiple split electrodes. The device operation is based on modulating resonance characteristics by the digital DC inputs. The proposed full adder is implemented with only two devices, considerably less complex than standard CMOS designs which require 24 or more transistors. While the current device has a 0.1 kHz speed and energy/operation in pJ, we show that by careful optimization and scaling of the devices, the speed can be increased to MHz and the energy can be reduced to sub-fJ, which shows the potential of this technology for ultra-low power applications with moderate processing requirements. The device is fabricated using silicon-on-insulator wafer with conventional surface micromachining techniques. The implemented circuit is CMOS compatible which allows its monolithic integration with other CMOS-based circuits. The micro-beam resonator operates at room temperature and moderate pressure of 700 mTorr.
UR - http://hdl.handle.net/10754/631733
UR - https://ieeexplore.ieee.org/document/8624042
UR - http://www.scopus.com/inward/record.url?scp=85062217814&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2018.8624042
DO - 10.1109/MWSCAS.2018.8624042
M3 - Conference contribution
SN - 9781538673928
SP - 623
EP - 626
BT - 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
PB - Institute of Electrical and Electronics Engineers (IEEE)
ER -