Development of polymer semiconductors for field-effect transistor devices in displays

The increasingly impressive electrical performance of organic semiconductors is driving the development of solution-based printing processes aimed at low cost fabrication of transistor devices. The most immediate application area will most likely be in active matrix displays, where transistors are used in the backplane circuitry, operating basically as an individual pixel switch. In liquid crystal displays (LCDs) and electrophoretic displays (EPDs), the transistor charges both the pixel and storage capacitor, whereas in an organic light-emitting diode display (OLED), the transistor delivers current to the diode element. Most medium and large size LCDs, i.e., monitor and television displays, employ amorphous silicon as the transistor semiconductor (high resolution displays often require polysilicon), with a charge carrier mobility of the order of 0.5 cm2/V s. The EPD effect can tolerate a lower performance from backplane transistors and is hence the most compatible with the performance limitations of organic transistors. As the EPD effect is reflective, the pixel transistor can occupy almost the full area underneath the pixel, in contrast to transmissive display effects such as LCD, where the opaque transistors block light from the backlight and therefore must be as small as possible (i.e., the pixel should have a high aperture ratio) to maximize the efficiency. This means that the EPD transistor width (W) is maximized and can deliver more current per pixel compensating for low mobility semiconductors. As a result, mobility specifications are in the region of 0.01 cm2/V s for a device with low refresh rates, low resolution, and small size. Another favorable aspect of the EPD effect is that once the pixel and storage capacitor is charged, no further power is required to retain the image, i.e., it is bistable. Thus the duty cycle load on the transistor is minimized, and subsequently the devices can potentially have longer lifetimes as their operational times are reduced. Increasing the display size and resolution, leading to higher number of rows and columns, faster pixel charging speeds, and consequently higher on-currents translates into higher semiconductor mobility requirements. Figure 13.1 illustrates a simplistic roadmap of display application development in relation to the requirements of the backplane transistors and the timing for commercialization [1].