Efficient mapping of mathematical expressions into DSP blocks

Bajaj Ronak; Suhaib A. Fahmy

doi:10.1109/FPL.2014.6927419

Efficient mapping of mathematical expressions into DSP blocks

Bajaj Ronak, Suhaib A. Fahmy

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Scopus citations

Abstract

Mapping complex mathematical expressions to DSP blocks through standard inference from pipelined code is inefficient and results in significantly reduced throughput. In this paper, we demonstrate the benefit of considering the structure and pipeline arrangement of DSP blocks during mapping. We have developed a tool that can map mathematical expressions using RTL inference, through high level synthesis with Vivado HLS, and through a custom approach that incorporates DSP block structure. We can show that the proposed method results in circuits that run at around double the frequency of other methods, demonstrating that the structure of the DSP block must be considered when scheduling complex expressions.

Original language	English (US)
Title of host publication	Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Print)	9783000446450
DOIs	https://doi.org/10.1109/FPL.2014.6927419
State	Published - Jan 1 2014
Externally published	Yes

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10.1109/FPL.2014.6927419

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title = "Efficient mapping of mathematical expressions into DSP blocks",

abstract = "Mapping complex mathematical expressions to DSP blocks through standard inference from pipelined code is inefficient and results in significantly reduced throughput. In this paper, we demonstrate the benefit of considering the structure and pipeline arrangement of DSP blocks during mapping. We have developed a tool that can map mathematical expressions using RTL inference, through high level synthesis with Vivado HLS, and through a custom approach that incorporates DSP block structure. We can show that the proposed method results in circuits that run at around double the frequency of other methods, demonstrating that the structure of the DSP block must be considered when scheduling complex expressions.",

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PY - 2014/1/1

Y1 - 2014/1/1

N2 - Mapping complex mathematical expressions to DSP blocks through standard inference from pipelined code is inefficient and results in significantly reduced throughput. In this paper, we demonstrate the benefit of considering the structure and pipeline arrangement of DSP blocks during mapping. We have developed a tool that can map mathematical expressions using RTL inference, through high level synthesis with Vivado HLS, and through a custom approach that incorporates DSP block structure. We can show that the proposed method results in circuits that run at around double the frequency of other methods, demonstrating that the structure of the DSP block must be considered when scheduling complex expressions.

AB - Mapping complex mathematical expressions to DSP blocks through standard inference from pipelined code is inefficient and results in significantly reduced throughput. In this paper, we demonstrate the benefit of considering the structure and pipeline arrangement of DSP blocks during mapping. We have developed a tool that can map mathematical expressions using RTL inference, through high level synthesis with Vivado HLS, and through a custom approach that incorporates DSP block structure. We can show that the proposed method results in circuits that run at around double the frequency of other methods, demonstrating that the structure of the DSP block must be considered when scheduling complex expressions.

UR - http://ieeexplore.ieee.org/document/6927419/

UR - http://www.scopus.com/inward/record.url?scp=84911164067&partnerID=8YFLogxK

U2 - 10.1109/FPL.2014.6927419

DO - 10.1109/FPL.2014.6927419

M3 - Conference contribution

SN - 9783000446450

BT - Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Efficient mapping of mathematical expressions into DSP blocks

Abstract

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