Error-aware design

Fadi Kurdahi; Ahmed Eltawil; Amin K. Djahromi; Mohammad Makhzan; Stanley Cheng

doi:10.1109/DSD.2007.4341443

Error-aware design

Fadi Kurdahi, Ahmed Eltawil, Amin K. Djahromi, Mohammad Makhzan, Stanley Cheng

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Scopus citations

Abstract

The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields. © 2007 IEEE.

Original language	English (US)
Title of host publication	Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
DOIs	https://doi.org/10.1109/DSD.2007.4341443
State	Published - Dec 1 2007
Externally published	Yes

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10.1109/DSD.2007.4341443

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title = "Error-aware design",

abstract = "The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields. {\textcopyright} 2007 IEEE.",

author = "Fadi Kurdahi and Ahmed Eltawil and Djahromi, {Amin K.} and Mohammad Makhzan and Stanley Cheng",

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AU - Djahromi, Amin K.

AU - Makhzan, Mohammad

AU - Cheng, Stanley

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PY - 2007/12/1

Y1 - 2007/12/1

N2 - The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields. © 2007 IEEE.

AB - The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields. © 2007 IEEE.

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M3 - Conference contribution

SN - 076952978X

BT - Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007

ER -

Error-aware design

Abstract

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