Abstract
We present a new approach to designing multi-mode FIR filters in FPGAs based on partitioning a design into shared, mode-independent blocks and reconfigurable, mode-specific regions. We also provide a theoretical formulation for finding an optimal sequence of modes that minimizes a joint cost function related to area and reconfiguration overhead. Our results show that for a group of template matching filters, appropriate mode sequencing can reduce area by up to 15% and reconfiguration overhead by as much as 26%. © 2010 IEEE.
Original language | English (US) |
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Title of host publication | Proceedings - 2010 International Conference on Field Programmable Logic and Applications, FPL 2010 |
DOIs | |
State | Published - Dec 1 2010 |
Externally published | Yes |