Abstract
We examine and demonstrate the benefit of high κ and metal gate on Si(110) orientation-only CMOS devices and demonstrate not only good PMOS but competitive NMOS device performance. It is shown that high k / metal gates on NMOS Si(110) surface have higher than expected performance due to velocity saturation of minority carriers. Improvement in source/drain extension results in nearly symmetric CMOS output characteristics with no stress enhancement. Examining potential circuit impact reveals that the Si(110) surface provides a significant improvement in performance for HP and LSTP without large process complexity associated with mixed orientation CMOS approaches.
Original language | English (US) |
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Article number | 4418862 |
Pages (from-to) | 57-60 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting, IEDM |
DOIs | |
State | Published - 2007 |
Externally published | Yes |
Event | 2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States Duration: Dec 10 2007 → Dec 12 2007 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry