Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs

J. Huang; P. D. Kirsch; M. Hussain; D. Heh; P. Sivasubramani; C. Young; D. C. Gilmer; C. S. Park; Y. N. Tan; C. Park; H. R. Harris; P. Majhi; G. Bersuker; B. H. Lee; H. H. Tseng; R. Jammy

doi:10.1109/VTSA.2008.4530842

Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs

J. Huang^*, P. D. Kirsch, M. Hussain, D. Heh, P. Sivasubramani, C. Young, D. C. Gilmer, C. S. Park, Y. N. Tan, C. Park, H. R. Harris, P. Majhi, G. Bersuker, B. H. Lee, H. H. Tseng, R. Jammy

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (T_inv=1.15nm), low V, =0.30V, high performance [I_on/I_off=μA/um) at 100(nA/urn)], low leakage (>200x reduction vs. SiO₂/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and V_t. SiON/HfLaSiON can give similar interface quality as SiO₂/HfSiON. Device performance was further improved 5% by strain engineering.

Original language	English (US)
Title of host publication	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Pages	152-153
Number of pages	2
DOIs	https://doi.org/10.1109/VTSA.2008.4530842
State	Published - 2008
Externally published	Yes
Event	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Hsinchu, Taiwan, Province of China Duration: Apr 21 2008 → Apr 23 2008

Publication series

Name	International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Other

Other	2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	04/21/08 → 04/23/08

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering

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10.1109/VTSA.2008.4530842

Cite this

Huang, J., Kirsch, P. D., Hussain, M., Heh, D., Sivasubramani, P., Young, C., Gilmer, D. C., Park, C. S., Tan, Y. N., Park, C., Harris, H. R., Majhi, P., Bersuker, G., Lee, B. H., Tseng, H. H., & Jammy, R. (2008). Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs. In 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA (pp. 152-153). Article 4530842 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2008.4530842

@inproceedings{b2c1740a51384b2385486e11f91fd15e,

title = "Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs",

abstract = "We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (Tinv=1.15nm), low V, =0.30V, high performance [Ion/Ioff=μA/um) at 100(nA/urn)], low leakage (>200x reduction vs. SiO2/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and Vt. SiON/HfLaSiON can give similar interface quality as SiO2/HfSiON. Device performance was further improved 5% by strain engineering.",

author = "J. Huang and Kirsch, {P. D.} and M. Hussain and D. Heh and P. Sivasubramani and C. Young and Gilmer, {D. C.} and Park, {C. S.} and Tan, {Y. N.} and C. Park and Harris, {H. R.} and P. Majhi and G. Bersuker and Lee, {B. H.} and Tseng, {H. H.} and R. Jammy",

year = "2008",

doi = "10.1109/VTSA.2008.4530842",

language = "English (US)",

isbn = "9781424416158",

series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",

pages = "152--153",

booktitle = "2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA",

note = "2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA ; Conference date: 21-04-2008 Through 23-04-2008",

}

Huang, J, Kirsch, PD, Hussain, M, Heh, D, Sivasubramani, P, Young, C, Gilmer, DC, Park, CS, Tan, YN, Park, C, Harris, HR, Majhi, P, Bersuker, G, Lee, BH, Tseng, HH & Jammy, R 2008, Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs. in 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA., 4530842, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, pp. 152-153, 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA, Hsinchu, Taiwan, Province of China, 04/21/08. https://doi.org/10.1109/VTSA.2008.4530842

Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs. / Huang, J.; Kirsch, P. D.; Hussain, M. et al.
2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA. 2008. p. 152-153 4530842 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs

AU - Huang, J.

AU - Kirsch, P. D.

AU - Hussain, M.

AU - Heh, D.

AU - Sivasubramani, P.

AU - Young, C.

AU - Gilmer, D. C.

AU - Park, C. S.

AU - Tan, Y. N.

AU - Park, C.

AU - Harris, H. R.

AU - Majhi, P.

AU - Bersuker, G.

AU - Lee, B. H.

AU - Tseng, H. H.

AU - Jammy, R.

PY - 2008

Y1 - 2008

N2 - We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (Tinv=1.15nm), low V, =0.30V, high performance [Ion/Ioff=μA/um) at 100(nA/urn)], low leakage (>200x reduction vs. SiO2/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and Vt. SiON/HfLaSiON can give similar interface quality as SiO2/HfSiON. Device performance was further improved 5% by strain engineering.

AB - We demonstrate for the first time a gate first high-k/metal gate (MG) nFET with EOT=0.74nm (Tinv=1.15nm), low V, =0.30V, high performance [Ion/Ioff=μA/um) at 100(nA/urn)], low leakage (>200x reduction vs. SiO2/PolySi) and good PBTI. Low-k interface layer scaling and high-k La-doping enable this desirable EOT and Vt. SiON/HfLaSiON can give similar interface quality as SiO2/HfSiON. Device performance was further improved 5% by strain engineering.

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U2 - 10.1109/VTSA.2008.4530842

DO - 10.1109/VTSA.2008.4530842

M3 - Conference contribution

AN - SCOPUS:49049110679

SN - 9781424416158

T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings

SP - 152

EP - 153

BT - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA

T2 - 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA

Y2 - 21 April 2008 through 23 April 2008

ER -

Huang J, Kirsch PD, Hussain M, Heh D, Sivasubramani P, Young C et al. Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs. In 2008 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA. 2008. p. 152-153. 4530842. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). doi: 10.1109/VTSA.2008.4530842

Gate first band edge hign-k/metal stacks with EOT=0.74nm for 22nm node nFETs

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