TY - GEN
T1 - Increasing manufacturing yield for wideband RF CMOS LNAs in the presence of process variations
AU - Nieuwoudt, Arthur
AU - Ragheb, Tamer
AU - Nejati, Hamid
AU - Massoud, Yehia
N1 - Generated from Scopus record by KAUST IRTS on 2022-09-13
PY - 2007/8/28
Y1 - 2007/8/28
N2 - In this paper, we develop several design techniques for reducing the impact of manufacturing variations on integrated wideband low noise amplifiers (LNA). Utilizing an efficient modeling and automated design methodology, we investigate the sensitivity of LNA performance metrics to process variations and determine that the input impedance matching is particularly sensitive to perturbations in component values. Based on the sensitivity analysis, we leverage several design techniques to increase the reliability of LNA designs. To mitigate the impact of process variations on the input impedance matching, we add additional circuit elements and tunable capacitors to dynamically compensate for manufacturing variations after fabrication. The results indicate that the proposed design techniques can increase manufacturing yield by up to one order of magnitude for input impedance matching with only a 14% increase in noise figure. © 2007 IEEE.
AB - In this paper, we develop several design techniques for reducing the impact of manufacturing variations on integrated wideband low noise amplifiers (LNA). Utilizing an efficient modeling and automated design methodology, we investigate the sensitivity of LNA performance metrics to process variations and determine that the input impedance matching is particularly sensitive to perturbations in component values. Based on the sensitivity analysis, we leverage several design techniques to increase the reliability of LNA designs. To mitigate the impact of process variations on the input impedance matching, we add additional circuit elements and tunable capacitors to dynamically compensate for manufacturing variations after fabrication. The results indicate that the proposed design techniques can increase manufacturing yield by up to one order of magnitude for input impedance matching with only a 14% increase in noise figure. © 2007 IEEE.
UR - http://ieeexplore.ieee.org/document/4149132/
UR - http://www.scopus.com/inward/record.url?scp=34548133278&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2007.89
DO - 10.1109/ISQED.2007.89
M3 - Conference contribution
SN - 0769527957
SP - 801
EP - 806
BT - Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007
ER -