Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL

Wu Ping Liu; Juan Boon Tan; Wei Lu; Shyam Pal; Yong Kong Siew; Hai Cong; Bei Chao Zhang; Xian Bin Wang; Fan Zhang; Liang Choo Hsia

Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL

Wu Ping Liu^*, Juan Boon Tan, Wei Lu, Shyam Pal, Yong Kong Siew, Hai Cong, Bei Chao Zhang, Xian Bin Wang, Fan Zhang, Liang Choo Hsia

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper we report on the successful integration of a 90nm low-k full VIA-first dual damascene process architecture using carbon-doped-oxide (CDO) and SiC etch-stop-layer (ESL). One of the key features of the integration scheme is that the effects of photoresist poisoning have been eliminated by optimization of the low-k (k< 3.0) film stack deposition process. The mechanisms underlying photoresist poisoning have been investigated through detailed partition studies. Electrical yield and reliability data will be shown to demonstrate the performance of the overall integration approach.

Original language	English (US)
Title of host publication	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers
Pages	70-71
Number of pages	2
State	Published - 2005
Externally published	Yes
Event	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH - Hsinchu, Taiwan, Province of China Duration: Apr 25 2005 → Apr 27 2005

Publication series

Name	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers

Other

Other	2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	04/25/05 → 04/27/05

ASJC Scopus subject areas

General Engineering

Cite this

Liu, W. P., Tan, J. B., Lu, W., Pal, S., Siew, Y. K., Cong, H., Zhang, B. C., Wang, X. B., Zhang, F., & Hsia, L. C. (2005). Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL. In 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers (pp. 70-71). Article T46 (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers).

Liu, Wu Ping ; Tan, Juan Boon ; Lu, Wei et al. / Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL. 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers. 2005. pp. 70-71 (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers).

@inproceedings{bfacdc204d7943649954c7b04f4924f9,

title = "Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL",

abstract = "In this paper we report on the successful integration of a 90nm low-k full VIA-first dual damascene process architecture using carbon-doped-oxide (CDO) and SiC etch-stop-layer (ESL). One of the key features of the integration scheme is that the effects of photoresist poisoning have been eliminated by optimization of the low-k (k< 3.0) film stack deposition process. The mechanisms underlying photoresist poisoning have been investigated through detailed partition studies. Electrical yield and reliability data will be shown to demonstrate the performance of the overall integration approach.",

author = "Liu, {Wu Ping} and Tan, {Juan Boon} and Wei Lu and Shyam Pal and Siew, {Yong Kong} and Hai Cong and Zhang, {Bei Chao} and Wang, {Xian Bin} and Fan Zhang and Hsia, {Liang Choo}",

year = "2005",

language = "English (US)",

isbn = "078039058X",

series = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers",

pages = "70--71",

booktitle = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers",

note = "2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH ; Conference date: 25-04-2005 Through 27-04-2005",

}

Liu, WP, Tan, JB, Lu, W, Pal, S, Siew, YK, Cong, H, Zhang, BC, Wang, XB, Zhang, F & Hsia, LC 2005, Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL. in 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers., T46, 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers, pp. 70-71, 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Hsinchu, Taiwan, Province of China, 04/25/05.

Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL. / Liu, Wu Ping; Tan, Juan Boon; Lu, Wei et al.
2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers. 2005. p. 70-71 T46 (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL

AU - Liu, Wu Ping

AU - Tan, Juan Boon

AU - Lu, Wei

AU - Pal, Shyam

AU - Siew, Yong Kong

AU - Cong, Hai

AU - Zhang, Bei Chao

AU - Wang, Xian Bin

AU - Zhang, Fan

AU - Hsia, Liang Choo

PY - 2005

Y1 - 2005

N2 - In this paper we report on the successful integration of a 90nm low-k full VIA-first dual damascene process architecture using carbon-doped-oxide (CDO) and SiC etch-stop-layer (ESL). One of the key features of the integration scheme is that the effects of photoresist poisoning have been eliminated by optimization of the low-k (k< 3.0) film stack deposition process. The mechanisms underlying photoresist poisoning have been investigated through detailed partition studies. Electrical yield and reliability data will be shown to demonstrate the performance of the overall integration approach.

AB - In this paper we report on the successful integration of a 90nm low-k full VIA-first dual damascene process architecture using carbon-doped-oxide (CDO) and SiC etch-stop-layer (ESL). One of the key features of the integration scheme is that the effects of photoresist poisoning have been eliminated by optimization of the low-k (k< 3.0) film stack deposition process. The mechanisms underlying photoresist poisoning have been investigated through detailed partition studies. Electrical yield and reliability data will be shown to demonstrate the performance of the overall integration approach.

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M3 - Conference contribution

AN - SCOPUS:27144526144

SN - 078039058X

T3 - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers

SP - 70

EP - 71

BT - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers

T2 - 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH

Y2 - 25 April 2005 through 27 April 2005

ER -

Liu WP, Tan JB, Lu W, Pal S, Siew YK, Cong H et al. Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL. In 2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA - TECH, Proceedings of Technical Papers. 2005. p. 70-71. T46. (2005 IEEE VLSI-TSA - International Symposium on VLSI Technology - VLSI-TSA-TECH, Proceedings of Technical Papers).

Integration of a poisoning-free dual damascene CDO film stack for 90 nm & beyond low-k BEOL

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