Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process

Zhibo Zhang; S. C. Song; Craig Huffman; Muhammad M. Hussain; Joel Barnett; Naim Moumen; Husam N. Alshareef; Prashant Majhi; Johnny H. Sim; Sang Ho Bae; Byoung Hun Lee

doi:10.1149/1.2030447

Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process

Zhibo Zhang^*, S. C. Song, Craig Huffman, Muhammad M. Hussain, Joel Barnett, Naim Moumen, Husam N. Alshareef, Prashant Majhi, Johnny H. Sim, Sang Ho Bae, Byoung Hun Lee

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

44 Scopus citations

Abstract

The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO₂ dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on HfO₂ and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.

Original language	English (US)
Pages (from-to)	G271-G274
Journal	Electrochemical and Solid-State Letters
Volume	8
Issue number	10
DOIs	https://doi.org/10.1149/1.2030447
State	Published - 2005
Externally published	Yes

ASJC Scopus subject areas

General Chemical Engineering
General Materials Science
Physical and Theoretical Chemistry
Electrochemistry
Electrical and Electronic Engineering

Access to Document

10.1149/1.2030447

Cite this

@article{5d5361889e884f0baa255d980829bf16,

title = "Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process",

abstract = "The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO2 dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on HfO2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.",

author = "Zhibo Zhang and Song, {S. C.} and Craig Huffman and Hussain, {Muhammad M.} and Joel Barnett and Naim Moumen and Alshareef, {Husam N.} and Prashant Majhi and Sim, {Johnny H.} and Bae, {Sang Ho} and Lee, {Byoung Hun}",

year = "2005",

doi = "10.1149/1.2030447",

language = "English (US)",

volume = "8",

pages = "G271--G274",

journal = "Electrochemical and Solid-State Letters",

issn = "1099-0062",

publisher = "Electrochemical Society",

number = "10",

}

TY - JOUR

T1 - Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process

AU - Zhang, Zhibo

AU - Song, S. C.

AU - Huffman, Craig

AU - Hussain, Muhammad M.

AU - Barnett, Joel

AU - Moumen, Naim

AU - Alshareef, Husam N.

AU - Majhi, Prashant

AU - Sim, Johnny H.

AU - Bae, Sang Ho

AU - Lee, Byoung Hun

PY - 2005

Y1 - 2005

N2 - The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO2 dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on HfO2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.

AB - The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on HfO2 dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on HfO2 and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to 85 nm have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.

UR - http://www.scopus.com/inward/record.url?scp=25644434391&partnerID=8YFLogxK

U2 - 10.1149/1.2030447

DO - 10.1149/1.2030447

M3 - Article

AN - SCOPUS:25644434391

SN - 1099-0062

VL - 8

SP - G271-G274

JO - Electrochemical and Solid-State Letters

JF - Electrochemical and Solid-State Letters

IS - 10

ER -

Integration of dual metal gate CMOS on high-k dielectrics utilizing a metal wet etch process

Abstract

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this