TY - JOUR
T1 - Interface state degradation during AC positive bias temperature instability stress
AU - Kang, Soo Cheol
AU - Kim, Seung Mo
AU - Jung, Ukjin
AU - Kim, Yonghun
AU - Park, Woojin
AU - Lee, Byoung Hun
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: This study was partly supported by the Nano Materials Technology Development Program (2016M3A7B4909941) and Creative Materials Discovery Program on Creative Multilevel Research Center (2015M3D1A1068062) through the National Research Foundation (NRF) of Korea, funded by the Ministry of Science and ICT, and by SAMSUNG System LSI.
PY - 2019/5/10
Y1 - 2019/5/10
N2 - The reliability of a bulk fin field-effect transistor (FinFET) with a high-k dielectric/metal-gate stack has been investigated by comparing the effects of DC and AC stresses. It is well known that the relaxation during the off-cycle of the AC stress decreases the Vth shift and enhances the device lifetime due to electron detrapping from the high-k dielectric. We found that the relaxation in the interface traps is significantly weaker than that of bulk traps during the unipolar and bipolar AC stresses. The weak recovery is attributed to the concurrent interface state generation during a positive-bias temperature instability (PBTI) stress. Eventually, the interface traps became a major source of the device drift (over 60%) at the high temperature of 400 K. This finding suggests that a new strategy is required to address the PBTI reliability focusing on the residual interface states as well as the bulk trapping, particularly at a high temperature.
AB - The reliability of a bulk fin field-effect transistor (FinFET) with a high-k dielectric/metal-gate stack has been investigated by comparing the effects of DC and AC stresses. It is well known that the relaxation during the off-cycle of the AC stress decreases the Vth shift and enhances the device lifetime due to electron detrapping from the high-k dielectric. We found that the relaxation in the interface traps is significantly weaker than that of bulk traps during the unipolar and bipolar AC stresses. The weak recovery is attributed to the concurrent interface state generation during a positive-bias temperature instability (PBTI) stress. Eventually, the interface traps became a major source of the device drift (over 60%) at the high temperature of 400 K. This finding suggests that a new strategy is required to address the PBTI reliability focusing on the residual interface states as well as the bulk trapping, particularly at a high temperature.
UR - http://hdl.handle.net/10754/656298
UR - https://linkinghub.elsevier.com/retrieve/pii/S003811011830604X
UR - http://www.scopus.com/inward/record.url?scp=85065789391&partnerID=8YFLogxK
U2 - 10.1016/j.sse.2019.05.006
DO - 10.1016/j.sse.2019.05.006
M3 - Article
SN - 0038-1101
VL - 158
SP - 46
EP - 50
JO - Solid-State Electronics
JF - Solid-State Electronics
ER -