TY - JOUR
T1 - Intrinsic Silicon Buffer Layer Improves Hole-Collecting Poly-Si Passivating Contact
AU - Kang, Jingxuan
AU - Liu, Wenzhu
AU - Allen, Thomas
AU - de Bastiani, Michele
AU - Yang, Xinbo
AU - De Wolf, Stefaan
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledged KAUST grant number(s): OSR-CRG URF/1/3383
Acknowledgements: J.K. and W.L. contributed equally to this work. This work was supported by funding from King Abdullah University of Science and Technology (KAUST) Oce of Sponsored Research (OSR) under award no. OSR-CRG URF/1/3383.
PY - 2020/5/11
Y1 - 2020/5/11
N2 - Passivating contacts consisting of doped polycrystalline silicon (poly-Si) on a thin tunnel-oxide enable excellent operating voltages for crystalline silicon solar cells. However, hole-collecting contacts based on boron-doped poly-Si do not yet reach their full surface-passivation potential, likely due to boron diffusion during annealing. In this work, the authors show how the insertion of a thin intrinsic silicon buffer layer between the silicon oxide and poly-Si is effective in improving the contact passivation. By tailoring the microstructure of the buffer layer, the chemical passivation and contact resistivity are simultaneously significantly improved. On device level, the buffer layer enables a ≈30 mV open-circuit voltage enhancement and 1.4% absolute gain in power conversion efficiency.
AB - Passivating contacts consisting of doped polycrystalline silicon (poly-Si) on a thin tunnel-oxide enable excellent operating voltages for crystalline silicon solar cells. However, hole-collecting contacts based on boron-doped poly-Si do not yet reach their full surface-passivation potential, likely due to boron diffusion during annealing. In this work, the authors show how the insertion of a thin intrinsic silicon buffer layer between the silicon oxide and poly-Si is effective in improving the contact passivation. By tailoring the microstructure of the buffer layer, the chemical passivation and contact resistivity are simultaneously significantly improved. On device level, the buffer layer enables a ≈30 mV open-circuit voltage enhancement and 1.4% absolute gain in power conversion efficiency.
UR - http://hdl.handle.net/10754/662818
UR - https://onlinelibrary.wiley.com/doi/abs/10.1002/admi.202000188
UR - http://www.scopus.com/inward/record.url?scp=85084486522&partnerID=8YFLogxK
U2 - 10.1002/admi.202000188
DO - 10.1002/admi.202000188
M3 - Article
SN - 2196-7350
SP - 2000188
JO - Advanced Materials Interfaces
JF - Advanced Materials Interfaces
ER -