Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload

Edward Grindley; Thurstan Gray; James Wilkinson; Chris Vaux; Adam Ardron; Jack Deeley; Alexander Elliott; Nidhin Thandassery Sumithran; Suhaib A. Fahmy

doi:10.1109/ICFPT59805.2023.00050

Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload

Edward Grindley^*, Thurstan Gray, James Wilkinson, Chris Vaux, Adam Ardron, Jack Deeley, Alexander Elliott, Nidhin Thandassery Sumithran, Suhaib A. Fahmy

^*Corresponding author for this work

Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

We present the NAIL Accelerator Interface Layer (NAIL), a framework for offloading to Field Programmable Gate Arrays. NAIL has been optimised for latency-sensitive applications, supporting isolated multi-user acceleration. It allows accelerators to be employed through a flexible host communication layer, using asynchronous operation while processing data anywhere in host memory. Multiple independent processors are supported with large numbers of concurrent tasks. NAIL has been deployed at significant scale, and is now released as open-source.

Original language	English (US)
Title of host publication	Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	290-291
Number of pages	2
ISBN (Electronic)	9798350359114
DOIs	https://doi.org/10.1109/ICFPT59805.2023.00050
State	Published - 2023
Event	22nd International Conference on Field-Programmable Technology, ICFPT 2023 - Yokohama, Japan Duration: Dec 12 2023 → Dec 14 2023

Publication series

Name	Proceedings - International Conference on Field-Programmable Technology, ICFPT
ISSN (Print)	2837-0430
ISSN (Electronic)	2837-0449

Conference

Conference	22nd International Conference on Field-Programmable Technology, ICFPT 2023
Country/Territory	Japan
City	Yokohama
Period	12/12/23 → 12/14/23

Keywords

Field programmable gate arrays
Virtualization

ASJC Scopus subject areas

Computer Science Applications
Hardware and Architecture
Software
Control and Optimization

Access to Document

10.1109/ICFPT59805.2023.00050

Cite this

Grindley, E., Gray, T., Wilkinson, J., Vaux, C., Ardron, A., Deeley, J., Elliott, A., Sumithran, N. T., & Fahmy, S. A. (2023). Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload. In Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023 (pp. 290-291). (Proceedings - International Conference on Field-Programmable Technology, ICFPT). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICFPT59805.2023.00050

Grindley, Edward ; Gray, Thurstan ; Wilkinson, James et al. / Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload. Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023. Institute of Electrical and Electronics Engineers Inc., 2023. pp. 290-291 (Proceedings - International Conference on Field-Programmable Technology, ICFPT).

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title = "Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload",

abstract = "We present the NAIL Accelerator Interface Layer (NAIL), a framework for offloading to Field Programmable Gate Arrays. NAIL has been optimised for latency-sensitive applications, supporting isolated multi-user acceleration. It allows accelerators to be employed through a flexible host communication layer, using asynchronous operation while processing data anywhere in host memory. Multiple independent processors are supported with large numbers of concurrent tasks. NAIL has been deployed at significant scale, and is now released as open-source.",

keywords = "Field programmable gate arrays, Virtualization",

author = "Edward Grindley and Thurstan Gray and James Wilkinson and Chris Vaux and Adam Ardron and Jack Deeley and Alexander Elliott and Sumithran, {Nidhin Thandassery} and Fahmy, {Suhaib A.}",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 22nd International Conference on Field-Programmable Technology, ICFPT 2023 ; Conference date: 12-12-2023 Through 14-12-2023",

year = "2023",

doi = "10.1109/ICFPT59805.2023.00050",

language = "English (US)",

series = "Proceedings - International Conference on Field-Programmable Technology, ICFPT",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "290--291",

booktitle = "Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023",

address = "United States",

}

Grindley, E, Gray, T, Wilkinson, J, Vaux, C, Ardron, A, Deeley, J, Elliott, A, Sumithran, NT & Fahmy, SA 2023, Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload. in Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023. Proceedings - International Conference on Field-Programmable Technology, ICFPT, Institute of Electrical and Electronics Engineers Inc., pp. 290-291, 22nd International Conference on Field-Programmable Technology, ICFPT 2023, Yokohama, Japan, 12/12/23. https://doi.org/10.1109/ICFPT59805.2023.00050

Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload. / Grindley, Edward; Gray, Thurstan; Wilkinson, James et al.
Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023. Institute of Electrical and Electronics Engineers Inc., 2023. p. 290-291 (Proceedings - International Conference on Field-Programmable Technology, ICFPT).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload

AU - Grindley, Edward

AU - Gray, Thurstan

AU - Wilkinson, James

AU - Vaux, Chris

AU - Ardron, Adam

AU - Deeley, Jack

AU - Elliott, Alexander

AU - Sumithran, Nidhin Thandassery

AU - Fahmy, Suhaib A.

PY - 2023

Y1 - 2023

N2 - We present the NAIL Accelerator Interface Layer (NAIL), a framework for offloading to Field Programmable Gate Arrays. NAIL has been optimised for latency-sensitive applications, supporting isolated multi-user acceleration. It allows accelerators to be employed through a flexible host communication layer, using asynchronous operation while processing data anywhere in host memory. Multiple independent processors are supported with large numbers of concurrent tasks. NAIL has been deployed at significant scale, and is now released as open-source.

AB - We present the NAIL Accelerator Interface Layer (NAIL), a framework for offloading to Field Programmable Gate Arrays. NAIL has been optimised for latency-sensitive applications, supporting isolated multi-user acceleration. It allows accelerators to be employed through a flexible host communication layer, using asynchronous operation while processing data anywhere in host memory. Multiple independent processors are supported with large numbers of concurrent tasks. NAIL has been deployed at significant scale, and is now released as open-source.

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KW - Virtualization

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M3 - Conference contribution

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BT - Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023

PB - Institute of Electrical and Electronics Engineers Inc.

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Grindley E, Gray T, Wilkinson J, Vaux C, Ardron A, Deeley J et al. Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload. In Proceedings - 2023 International Conference on Field-Programmable Technology, ICFPT 2023. Institute of Electrical and Electronics Engineers Inc. 2023. p. 290-291. (Proceedings - International Conference on Field-Programmable Technology, ICFPT). doi: 10.1109/ICFPT59805.2023.00050

Introducing the NAIL Accelerator Interface Layer for Low Latency FPGA Offload

Abstract

Publication series

Conference

Keywords

ASJC Scopus subject areas

Access to Document

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