Neuromorphic computation promises to be an energy-efficient information processing technique both for the biological and the real-world environments. In this paper a novel structure of silicon neuron has been designed for measuring the variation of a sensor capacitance. The current-reuse technique and the subthreshold region operation of MOSFETs help achieving ultra-low-power consumption. The proposed silicon neuron is designed and simulated in 0.13-μm standard CMOS technology. The entire unit consists of 43 transistors and consumes only 33 nW with a supply voltage of 1 V. The output frequency is proportional to the variation of the sensor capacitance. © 2012 IEEE.
|Original language||English (US)|
|Title of host publication||2012 IEEE 13th Annual Wireless and Microwave Technology Conference, WAMICON 2012|
|State||Published - Jul 13 2012|