Abstract
In this work, a bottom-gate charge trapping memory device with Zinc-Oxide (ZnO) channel and 2-nm Si nanoparticles (Si-NPs) embedded in ZnO charge trapping layer is demonstrated. The active layers of the memory device are deposited by atomic layer deposition (ALD) and the Si-NPs are deposited by spin coating. The Si-NPs memory exhibits a threshold voltage (Vt) shift of 6.3 V at an operating voltage of -10/10 V while 2.6 V Vt shift is obtained without nanoparticles confirming that the Si-NPs act as energy states within the bandgap of the ZnO layer. In addition, a 3.4 V Vt is achieved at a very low operating voltage of -1 V/1 V due to the charging of the Si-NPs through Poole-Frenkel emission mechanism at an electric field across the tunnel oxide E > 0.36 MV/cm. The results highlight a promising technology for future ultra-low power memory devices.
Original language | English (US) |
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Pages | 45-49 |
Number of pages | 5 |
DOIs | |
State | Published - 2014 |
Event | Symposium on State-of-the-Art Program on Compound Semiconductors 56, SOTAPOCS 2014 - 2014 ECS and SMEQ Joint International Meeting - Cancun, Mexico Duration: Oct 5 2014 → Oct 9 2014 |
Other
Other | Symposium on State-of-the-Art Program on Compound Semiconductors 56, SOTAPOCS 2014 - 2014 ECS and SMEQ Joint International Meeting |
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Country/Territory | Mexico |
City | Cancun |
Period | 10/5/14 → 10/9/14 |
ASJC Scopus subject areas
- General Engineering