Memristor memory trade-offs and design considerations

Sami Smaili; Yehia Massoud

doi:10.1109/NANO.2014.6968147

Memristor memory trade-offs and design considerations

Sami Smaili, Yehia Massoud

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability and ability to retain their state when turned off. In this paper we present design considerations for memristor memories for robust operation and discuss the trade-off between reading operations, refresh rates, and writing, stemming from the inherent variability of the memristor state when read.

Original language	English (US)
Title of host publication	Proceedings of the IEEE Conference on Nanotechnology
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	494-498
Number of pages	5
ISBN (Print)	9781479956227
DOIs	https://doi.org/10.1109/NANO.2014.6968147
State	Published - Nov 26 2014
Externally published	Yes

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10.1109/NANO.2014.6968147

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N2 - The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability and ability to retain their state when turned off. In this paper we present design considerations for memristor memories for robust operation and discuss the trade-off between reading operations, refresh rates, and writing, stemming from the inherent variability of the memristor state when read.

AB - The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability and ability to retain their state when turned off. In this paper we present design considerations for memristor memories for robust operation and discuss the trade-off between reading operations, refresh rates, and writing, stemming from the inherent variability of the memristor state when read.

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BT - Proceedings of the IEEE Conference on Nanotechnology

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Memristor memory trade-offs and design considerations

Abstract

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