Abstract
A compression scheme is disclosed for program executables that run on Reduced Instruction Set Computer (RISC) processors, such as the PowerPC architecture. The RISC instruction set is expanded by adding opcodes to produce code that facilitates the removal of redundant fields. To compress a program, a compressor engine rewrites the executable using the new expanded instruction set. Next, a filter is applied to remove the redundant fields from the expanded instructions. A conventional compression technique such as Huffman encoding is then applied on the resulting code.
Original language | English (US) |
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Patent number | US6195743 |
IPC | G06F 9/ 318 A I |
Priority date | 01/29/99 |
State | Published - Feb 27 2001 |
Externally published | Yes |