TY - JOUR
T1 - Metrology Sampling Strategies for Process Monitoring Applications
AU - Vincent, Tyrone L.
AU - Stirton, James Broc
AU - Poolla, Kameshwar
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledged KAUST grant number(s): 025478
Acknowledgements: This work was supported in part by the National Science Foundation, under Grants ECCS-0925337 and CNS-0931748, by OOF991-KAUST US Ltd., under Award 025478, and by the UC Discovery Grant ele07-10283, under the IMPACT Program.
This publication acknowledges KAUST support, but has no KAUST affiliated authors.
PY - 2011/11
Y1 - 2011/11
N2 - Shrinking process windows in very large scale integration semiconductor manufacturing have already necessitated the development of control systems capable of addressing sub-lot-level variation. Within-wafer control is the next milestone in the evolution of advanced process control from lot-based and wafer-based control. In order to adequately comprehend and control within-wafer spatial variation, inline measurements must be performed at multiple locations across the wafer. At the same time, economic pressures prompt a reduction in metrology, for both capital and cycle-time reasons. This paper explores the use of modeling and minimum-variance prediction as a method to select the sites for measurement on each wafer. The models are developed using the standard statistical tools of principle component analysis and canonical correlation analysis. The proposed selection method is validated using real manufacturing data, and results indicate that it is possible to significantly reduce the number of measurements with little loss in the information obtained for the process control systems. © 2011 IEEE.
AB - Shrinking process windows in very large scale integration semiconductor manufacturing have already necessitated the development of control systems capable of addressing sub-lot-level variation. Within-wafer control is the next milestone in the evolution of advanced process control from lot-based and wafer-based control. In order to adequately comprehend and control within-wafer spatial variation, inline measurements must be performed at multiple locations across the wafer. At the same time, economic pressures prompt a reduction in metrology, for both capital and cycle-time reasons. This paper explores the use of modeling and minimum-variance prediction as a method to select the sites for measurement on each wafer. The models are developed using the standard statistical tools of principle component analysis and canonical correlation analysis. The proposed selection method is validated using real manufacturing data, and results indicate that it is possible to significantly reduce the number of measurements with little loss in the information obtained for the process control systems. © 2011 IEEE.
UR - http://hdl.handle.net/10754/598820
UR - http://ieeexplore.ieee.org/document/5871722/
UR - http://www.scopus.com/inward/record.url?scp=80455149730&partnerID=8YFLogxK
U2 - 10.1109/TSM.2011.2159139
DO - 10.1109/TSM.2011.2159139
M3 - Article
SN - 0894-6507
VL - 24
SP - 489
EP - 498
JO - IEEE Transactions on Semiconductor Manufacturing
JF - IEEE Transactions on Semiconductor Manufacturing
IS - 4
ER -