New current mode programmable cellular neural network

L. Ravezzi; G. F. Dalla Betta; G. Setti

New current mode programmable cellular neural network

L. Ravezzi, G. F. Dalla Betta, G. Setti

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We report on the design of a new full-analog current-mode CNN in a 1.2 μm CMOS technology, whose cell care is characterized by an intrinsic capability of weights control, low power consumption and small area occupation. Circuit simulations allowed the design approach to be validated and the electrical performance of the CNN to be predicted; moreover, it is shown that the proposed CNN can be successfully adopted for several applications in image processing. A preliminary CNN test-chip, consisting of a 8×1 array for CCD and shadow detection, is currently being fabricated at IRST (Trento, Italy) in a 2.5 μm CMOS technology.

Original language	English (US)
Title of host publication	Proceedings of the IEEE International Workshop on Cellular Neural Networks and their Applications
Publisher	IEEEPiscataway, NJ, United States
Pages	253-258
Number of pages	6
State	Published - Jan 1 1998
Externally published	Yes

Cite this

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title = "New current mode programmable cellular neural network",

abstract = "We report on the design of a new full-analog current-mode CNN in a 1.2 μm CMOS technology, whose cell care is characterized by an intrinsic capability of weights control, low power consumption and small area occupation. Circuit simulations allowed the design approach to be validated and the electrical performance of the CNN to be predicted; moreover, it is shown that the proposed CNN can be successfully adopted for several applications in image processing. A preliminary CNN test-chip, consisting of a 8×1 array for CCD and shadow detection, is currently being fabricated at IRST (Trento, Italy) in a 2.5 μm CMOS technology.",

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PY - 1998/1/1

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N2 - We report on the design of a new full-analog current-mode CNN in a 1.2 μm CMOS technology, whose cell care is characterized by an intrinsic capability of weights control, low power consumption and small area occupation. Circuit simulations allowed the design approach to be validated and the electrical performance of the CNN to be predicted; moreover, it is shown that the proposed CNN can be successfully adopted for several applications in image processing. A preliminary CNN test-chip, consisting of a 8×1 array for CCD and shadow detection, is currently being fabricated at IRST (Trento, Italy) in a 2.5 μm CMOS technology.

AB - We report on the design of a new full-analog current-mode CNN in a 1.2 μm CMOS technology, whose cell care is characterized by an intrinsic capability of weights control, low power consumption and small area occupation. Circuit simulations allowed the design approach to be validated and the electrical performance of the CNN to be predicted; moreover, it is shown that the proposed CNN can be successfully adopted for several applications in image processing. A preliminary CNN test-chip, consisting of a 8×1 array for CCD and shadow detection, is currently being fabricated at IRST (Trento, Italy) in a 2.5 μm CMOS technology.

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EP - 258

BT - Proceedings of the IEEE International Workshop on Cellular Neural Networks and their Applications

PB - IEEEPiscataway, NJ, United States

ER -

New current mode programmable cellular neural network

Abstract

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