TY - JOUR
T1 - Notice of Retraction: Variability Analysis of Memristor-based Sigmoid Function
AU - Kaiyrbekov, Nursultan
AU - Krestinskaya, Olga
AU - Pappachen James, Alex
N1 - Generated from Scopus record by KAUST IRTS on 2023-09-23
PY - 2018/9/28
Y1 - 2018/9/28
N2 - Activation functions are widely used in neural networks to decide the activation value of the neural unit based on linear combinations of the weighted inputs. The effective implementation of activation function is highly important to enhance he performance of a neural network. One of the most widely used activation functions is sigmoid. Therefore, there is a growing interest to enhance the performance of sigmoid circuits. In this paper, the main objective is to modify existing current mirror based sigmoid model by replacing CMOS transistors with memristive devices. We present the performance, variation of transistor sizes and temperature. The area, power and noise in the modified CMOS-memristive sigmoid circuit are shown. The application of memristors in the sigmoid circuit ensures the reduction of on-chip area, and power dissipation by 7%. The proposed sigmoid circuit was simulated in SPICE using TSMC 180nm CMOS design process.
AB - Activation functions are widely used in neural networks to decide the activation value of the neural unit based on linear combinations of the weighted inputs. The effective implementation of activation function is highly important to enhance he performance of a neural network. One of the most widely used activation functions is sigmoid. Therefore, there is a growing interest to enhance the performance of sigmoid circuits. In this paper, the main objective is to modify existing current mirror based sigmoid model by replacing CMOS transistors with memristive devices. We present the performance, variation of transistor sizes and temperature. The area, power and noise in the modified CMOS-memristive sigmoid circuit are shown. The application of memristors in the sigmoid circuit ensures the reduction of on-chip area, and power dissipation by 7%. The proposed sigmoid circuit was simulated in SPICE using TSMC 180nm CMOS design process.
UR - https://ieeexplore.ieee.org/document/8476878/
UR - http://www.scopus.com/inward/record.url?scp=85055984891&partnerID=8YFLogxK
U2 - 10.1109/CoCoNet.2018.8476878
DO - 10.1109/CoCoNet.2018.8476878
M3 - Article
SP - 206
EP - 209
JO - Proceedings of the 2nd International Conference on Computing and Network Communications, CoCoNet 2018
JF - Proceedings of the 2nd International Conference on Computing and Network Communications, CoCoNet 2018
ER -