TY - GEN
T1 - Optically Controlled Charge Trapping Memory Based on Spin Coated Hafnium Diselenide Flakes
AU - Alqahtani, Bashayr
AU - Elatab, Nazek
N1 - KAUST Repository Item: Exported on 2023-09-04
Acknowledgements: Research supported by King Abdullah University of Science and Technology baseline fund.
PY - 2023/7/2
Y1 - 2023/7/2
N2 - This paper demonstrates the seamless fabrication of optoelectronic memory by integrating HfSe 2 as a charge-trapping layer in a MOS memory structure. Through a spin coating technique, solution-processable HfSe 2 flakes with average thicknesses of 2 nm were deposited between the tunneling and blocking oxide layers. The charge-trapping material distribution and thickness were explored by Atomic Force Microscopy and X-ray Diffraction Spectroscopy. The electrical characterization of MOS memory revealed a memory window of 5.5 Volts under ±16 Volts biasing. Furthermore, the memory endurance exceeds 10 4 electrical programming and erasing cycles. The retention test performed at room temperature showed that the memory device is expected to lose only 10% of the stored charges after 10 years. Under light stimuli (405nm wavelength and output power ~ 20 mW) with electrical readout voltage, the MOS memory showed an increase in the memory window from 5.5 Volts to 6.5 Volts.
AB - This paper demonstrates the seamless fabrication of optoelectronic memory by integrating HfSe 2 as a charge-trapping layer in a MOS memory structure. Through a spin coating technique, solution-processable HfSe 2 flakes with average thicknesses of 2 nm were deposited between the tunneling and blocking oxide layers. The charge-trapping material distribution and thickness were explored by Atomic Force Microscopy and X-ray Diffraction Spectroscopy. The electrical characterization of MOS memory revealed a memory window of 5.5 Volts under ±16 Volts biasing. Furthermore, the memory endurance exceeds 10 4 electrical programming and erasing cycles. The retention test performed at room temperature showed that the memory device is expected to lose only 10% of the stored charges after 10 years. Under light stimuli (405nm wavelength and output power ~ 20 mW) with electrical readout voltage, the MOS memory showed an increase in the memory window from 5.5 Volts to 6.5 Volts.
UR - http://hdl.handle.net/10754/694015
UR - https://ieeexplore.ieee.org/document/10231218/
U2 - 10.1109/nano58406.2023.10231218
DO - 10.1109/nano58406.2023.10231218
M3 - Conference contribution
BT - 2023 IEEE 23rd International Conference on Nanotechnology (NANO)
PB - IEEE
ER -