TY - GEN
T1 - Parameter-variation-aware analysis for noise robustness
AU - Mondal, Mosin
AU - Mohanram, Kartik
AU - Massoud, Yehia
N1 - Generated from Scopus record by KAUST IRTS on 2022-09-13
PY - 2007/8/28
Y1 - 2007/8/28
N2 - This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-duration profiles, and can be used to derive a noise susceptibility metric for the noise robustness of logic gates. Analytical methods - based upon calibration runs in circuit simulators - to determine noise susceptibility in the presence of variations in process, design, and environmental parameters (Leff, VT, VDD, and W) are described. Such analytical methods can be used not only to accurately estimate the impact of variability on noise robustness, but also to optimize designs for noise robustness. © 2007 IEEE.
AB - This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-duration profiles, and can be used to derive a noise susceptibility metric for the noise robustness of logic gates. Analytical methods - based upon calibration runs in circuit simulators - to determine noise susceptibility in the presence of variations in process, design, and environmental parameters (Leff, VT, VDD, and W) are described. Such analytical methods can be used not only to accurately estimate the impact of variability on noise robustness, but also to optimize designs for noise robustness. © 2007 IEEE.
UR - http://ieeexplore.ieee.org/document/4149109/
UR - http://www.scopus.com/inward/record.url?scp=34548127952&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2007.115
DO - 10.1109/ISQED.2007.115
M3 - Conference contribution
SN - 0769527957
SP - 655
EP - 659
BT - Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007
ER -