Integrated dc-dc converters are widely used for the realization of power converters suitable for energy harvesting and computing systems. In such systems, integrated converters are the ideal candidate due to their small size and low power consumption. Integrated dc-dc converters typically use spiral inductors to achieve high levels of integration and performance. However, under scenarios where energy scarcity is paramount, the integrated converter with spiral inductor requires careful modeling and optimization to achieve maximum efficiency. In this paper, we provide a parasitic aware design technique that takes into account the spiral inductor resistance as well as the switching parasitics, while utilizing numerical methods, to arrive at converter designs with robust performance and optimal efficiency. We translate the various system constraints into design rules and use them to formulate the various design parameters, from switching frequency to duty cycle, in terms of the inductance. We study how these parameters are dependent on each other, giving rise to multiple tradeoffs. We also present a method for minimizing power losses using optimization techniques, which leverage our formulation of the system parameters in terms of inductance.
|Original language||English (US)|
|Number of pages||9|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|State||Published - Dec 1 2015|
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering