Rear-surface passivation and design for thin p-type multicrystalline silicon solar cells

Recently, an important trend within crystalline silicon solar cell processing is the assignment of a more prominent role to thin (≤ 150 μm) substrates. This considerably reduces dominant material costs, albeit at the expense of giving up well-established solar cell processing steps, such as the screenprinted aluminium back-surface-field (BSF) and contact formation, due to excessive warping of the cells. Next to this, thinner wafers evidently increase the need for excellent rear-surface passivation-schemes. Finally, it is generally accepted that when using multicrystalline Si (mc-Si) substrates, dedicated processing-steps are essential to upgrade the average minority charge carrier lifetime in the bulk, τ_bulk. Generally, this is done by applying gettering and/or hydrogenation-steps, both being relatively high temperature steps. Futhermore, for such thin solar cells, to be sufficiently efficient, the minority charge carrier diffusion length in the bulk, L_bulk, should exceed twice the waferthickness. This paper describes a solar cell processing route potentially overcoming all three constraints as pointed out on thinp-type mc-Si silicon substrates. It will be shown that the use of POCl₃-diffusion is rather essential to increase τ_bulk. For the rear side, it is then shown that direct Plasma Enhanced Chemical Vapour Deposited (PECVD) a-Si:H layers can yield surface recombination velocities with values below 1.5 m.s^-1. This is achieved throughout a broad excess minority charge carrier density, Δn. range of about 5 × 10¹⁸ to 5 × 10²²m^-3, for 20nm thick intrinsic PECVD a-Si layers on top of 1.0 times; 10^-2Ω.m p-type Float Zone (FZ) silicon wafers. Finally, results are given of subsequent POCl₃ gettering and PECVD a-Si:H surface passivation throughout a complete cast mc-Si Polix 1.0 × 10^-2Ω.m p-type ingot by means of L_eff extraction.