Relays do not leak - CMOS does

Hossein Fariborzi, Fred Chen, Rhesa Nathanael, I. Ru Chen, Louis Hutin, Rinus Lee, Tsu Jae King Liu, Vladimir Stojanovic

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

19 Scopus citations


This paper describes the micro-architectural and circuit design techniques for building complex VLSI circuits with microelectromechanical (MEM) relays and presents experimental results to demonstrate the viability of this technology. By tailoring the circuits and micro-architecture to the relay device characteristics, the performance of the relay-based multiplier is improved by an order of magnitude over any known static CMOS style implementation, and by ∼4x over CMOS pass-gate equivalent implementations. A 16-bit relay multiplier is shown to offer ∼10x lower energy per operation at sub-10 MOPS throughputs when compared to an optimized CMOS multiplier at an equivalent 90 nm technology node. The functionality of the primary multiplier building block, a full (7:3) compressor built with 46 scaled MEM-relays, which is the largest working MEMrelay circuit reported to date, is also demonstrated.

Original languageEnglish (US)
Title of host publicationProceedings of the 50th Annual Design Automation Conference, DAC 2013
StatePublished - 2013
Event50th Annual Design Automation Conference, DAC 2013 - Austin, TX, United States
Duration: May 29 2013Jun 7 2013

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X


Other50th Annual Design Automation Conference, DAC 2013
Country/TerritoryUnited States
CityAustin, TX


  • Energy-aware VLSI design
  • Ideal switches
  • MEM-relays
  • Multipliers

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation


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