Silicon Nanowire Charge Trapping Memory for Energy-Efficient Neuromorphic Computing

Md Hasan Raza Ansari, Udaya Mohanan Kannan, Nazek El-Atab*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


This work highlights the utilization of the floating body effect and charge-trapping/de-trapping phenomenon of a Silicon-nanowire (Si-nanowire) charge-trapping memory for an artificial synapse of neuromorphic computing application. Charge trapping/de-trapping in the nitride layer characterizes the long-term potentiation (LTP)/depression (LTD). The accumulation of holes in the potential well achieves short-term potentiation (STP) and controls the transition from STP to LTP. Also, the transition from STP to LTP is analyzed through gate length scaling and high-κ material (Al2O3) for blocking oxide. Furthermore, the conductance values of the device are utilized for system-level simulation. System-level hardware parameters of a convolutional neural network (CNN) for inference applications are evaluated and compared to a static random-access memory (SRAM) device and charge-trapping memory. The results confirm that the Si-nanowire transistor with better gate controllability has a high retention time for LTP states, consumes low power, and archives better accuracy (91.27%). These results make the device suitable for low-power neuromorphic applications.

Original languageEnglish (US)
Pages (from-to)409-416
Number of pages8
JournalIEEE Transactions on Nanotechnology
StatePublished - 2023


  • gate all around (GAA)
  • long term depression (LTD)
  • long term potentiation (LTP)
  • neural network
  • neuromorphic computing
  • short term potentiation (STP)
  • Si-nanowire
  • synaptic transistor

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering


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