Abstract
The goal of this work was to simulate the effect of the finite conductivity of semiconductor substrates on the on-chip coupling inductance and then to investigate the effect of the on-chip coupling inductance on circuit crosstalk. In addition, the limitations of standard approaches for estimating coupling inductance are examined. A method for the reduction of the coupling inductance and its effect on circuit crosstalk is also discussed.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 286-290 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 10 |
| Issue number | 3 |
| DOIs | |
| State | Published - Jun 1 2002 |
| Externally published | Yes |
ASJC Scopus subject areas
- Hardware and Architecture
- Software
- Electrical and Electronic Engineering