TY - JOUR
T1 - Simulation study of a 3-D device integrating FinFET and UTBFET
AU - Fahad, Hossain M.
AU - Hu, Chenming
AU - Hussain, Muhammad Mustafa
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: This work was supported by the Office of Competitive Research Funds through the King Abdullah University of Science and Technology, Thuwal, Saudi Arabia, under Grant CRG-1-2012-HUS-008. The review of this paper was arranged by Editor D. Esseni.
PY - 2015/1
Y1 - 2015/1
N2 - By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate FinFETs with unprecedented levels of chip-area efficiency. This makes it suitable for ultralarge-scale integration high-performance logic at and beyond the 10-nm technology node.
AB - By integrating 3-D nonplanar fins and 2-D ultrathin bodies, wavy FinFETs merge two formerly competing technologies on a silicon-on-insulator platform to deliver enhanced transistor performance compared with conventional trigate FinFETs with unprecedented levels of chip-area efficiency. This makes it suitable for ultralarge-scale integration high-performance logic at and beyond the 10-nm technology node.
UR - http://hdl.handle.net/10754/563989
UR - http://ieeexplore.ieee.org/document/6971130/
UR - http://www.scopus.com/inward/record.url?scp=84920116680&partnerID=8YFLogxK
U2 - 10.1109/TED.2014.2372695
DO - 10.1109/TED.2014.2372695
M3 - Article
SN - 0018-9383
VL - 62
SP - 83
EP - 87
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 1
ER -