@inproceedings{8721e7c46ecf487c97e2b18466add9a8,
title = "Single-Body-Integrated Complementary Tunneling Field-Effect Transistor (SBI CTFET) and Design Consideration of Processing Margin in Dual-Gate Formation",
abstract = "In this work, a novel single-body-integrated complementary tunneling field-effect transistor (SBI CTFET) is proposed and optimally designed by series of rigorous device simulations. The proposed device demonstrates both n-type and p-type enhancement operations free from the ambipolar characteristics of a TFET sharing the channel in common, enabling highly reliable operations and plausibly scaled cell area. The subthreshold swing (S) values for n-type and p-type in the single cell were 55 mV/dec. Moreover, the processing margin in forming its dual gates is systematically suggested for future designers.",
keywords = "area scaling, complementary tunneling field-effect transistor, enhancement mode, processing margin, reliable operation, single-body-integration",
author = "Soomin Kim and Seeun Oh and Ansari, {Md Hasan Raza} and Nazek El-Atab and Seongjae Cho",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 2023 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2023 ; Conference date: 23-10-2023 Through 25-10-2023",
year = "2023",
doi = "10.1109/ICCE-Asia59966.2023.10326399",
language = "English (US)",
series = "2023 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2023",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2023 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2023",
address = "United States",
}