TY - JOUR
T1 - Solution-processed p-type copper(I) thiocyanate (CuSCN) for low-voltage flexible thin-film transistors and integrated inverter circuits
AU - Petti, Luisa
AU - Pattanasattayavong, Pichaya
AU - Lin, Yen-Hung
AU - Münzenrieder, Niko
AU - Cantarella, Giuseppe
AU - Yaacobi-Gross, Nir
AU - Yan, Feng
AU - Tröster, Gerhard
AU - Anthopoulos, Thomas D.
N1 - KAUST Repository Item: Exported on 2020-10-01
Acknowledgements: The authors would like to acknowledge N. Wijeyasinghe from Imperial College London for her support during the device and circuit fabrication and characterization.
PY - 2017/3/17
Y1 - 2017/3/17
N2 - We report on low operating voltage thin-film transistors (TFTs) and integrated inverters based on copper(I) thiocyanate (CuSCN) layers processed from solution at low temperature on free-standing plastic foils. As-fabricated coplanar bottom-gate and staggered top-gate TFTs exhibit hole-transporting characteristics with average mobility values of 0.0016 cm2 V−1 s−1 and 0.013 cm2 V−1 s−1, respectively, current on/off ratio in the range 102–104, and maximum operating voltages between −3.5 and −10 V, depending on the gate dielectric employed. The promising TFT characteristics enable fabrication of unipolar NOT gates on flexible free-standing plastic substrates with voltage gain of 3.4 at voltages as low as −3.5 V. Importantly, discrete CuSCN transistors and integrated logic inverters remain fully functional even when mechanically bent to a tensile radius of 4 mm, demonstrating the potential of the technology for flexible electronics.
AB - We report on low operating voltage thin-film transistors (TFTs) and integrated inverters based on copper(I) thiocyanate (CuSCN) layers processed from solution at low temperature on free-standing plastic foils. As-fabricated coplanar bottom-gate and staggered top-gate TFTs exhibit hole-transporting characteristics with average mobility values of 0.0016 cm2 V−1 s−1 and 0.013 cm2 V−1 s−1, respectively, current on/off ratio in the range 102–104, and maximum operating voltages between −3.5 and −10 V, depending on the gate dielectric employed. The promising TFT characteristics enable fabrication of unipolar NOT gates on flexible free-standing plastic substrates with voltage gain of 3.4 at voltages as low as −3.5 V. Importantly, discrete CuSCN transistors and integrated logic inverters remain fully functional even when mechanically bent to a tensile radius of 4 mm, demonstrating the potential of the technology for flexible electronics.
UR - http://hdl.handle.net/10754/623105
UR - http://aip.scitation.org/doi/10.1063/1.4978531
UR - http://www.scopus.com/inward/record.url?scp=85016136625&partnerID=8YFLogxK
U2 - 10.1063/1.4978531
DO - 10.1063/1.4978531
M3 - Article
SN - 0003-6951
VL - 110
SP - 113504
JO - Applied Physics Letters
JF - Applied Physics Letters
IS - 11
ER -