Abstract
An analog-to-digital circuit that digitizes an analog voltage. The analog-to-digital circuit includes plural comparators functionally connected to form a tree that has levels i, and each level i has branches j, and an encoder connected to the plural comparators and configured to generate a digitized value of an input analog voltage. Each comparator from a level i has first and second outputs, and each of the first and second outputs is electrically connected to an input of different comparators from a next level i+1 of the tree.
Original language | English (US) |
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Patent number | US2022158650 |
IPC | H03M 1/ 36 A I |
Priority date | 03/2/20 |
State | Published - May 19 2022 |