Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling

M. A. Quevedo-Lopez; P. D. Kirsch; S. Krishnan; H. N. Alshareef; J. Barnett; H. R. Harris; A. Neugroschel; F. S. Aguirre-Tostado; B. E. Gnade; M. J. Kim; R. M. Wallace; B. H. Lee

doi:10.1109/essder.2006.307651

Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling

M. A. Quevedo-Lopez, P. D. Kirsch, S. Krishnan, H. N. Alshareef, J. Barnett, H. R. Harris, A. Neugroschel, F. S. Aguirre-Tostado, B. E. Gnade, M. J. Kim, R. M. Wallace, B. H. Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

A systematic study to optimize gate stack constituents (interface, high- κ, metal gate) to maximize carrier mobility with aggressively scaled equivalent oxide thickness (EOT) is presented. We identify ultra-thin thermal oxide, atomic layer deposited HfSiON and optimized plasma nitridation performed in sequence as the optimized run path for sub-nm EOT scaling with high carrier mobility. A metal gate deposition process that minimizes the incorporation of impurities in HfSiON is also vital to maintaining good mobility at low EOTs.

Original language	English (US)
Title of host publication	ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference
Publisher	IEEE Computer Society
Pages	113-116
Number of pages	4
ISBN (Print)	1424403014, 9781424403011
DOIs	https://doi.org/10.1109/essder.2006.307651
State	Published - 2006
Externally published	Yes
Event	ESSDERC 2006 - 36th European Solid-State Device Research Conference - Montreux, Switzerland Duration: Sep 19 2006 → Sep 21 2006

Publication series

Name	ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference
Volume	2006-January

Other

Other	ESSDERC 2006 - 36th European Solid-State Device Research Conference
Country/Territory	Switzerland
City	Montreux
Period	09/19/06 → 09/21/06

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

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10.1109/essder.2006.307651

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Quevedo-Lopez, M. A., Kirsch, P. D., Krishnan, S., Alshareef, H. N., Barnett, J., Harris, H. R., Neugroschel, A., Aguirre-Tostado, F. S., Gnade, B. E., Kim, M. J., Wallace, R. M., & Lee, B. H. (2006). Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling. In ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference (pp. 113-116). Article 4099869 (ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference; Vol. 2006-January). IEEE Computer Society. https://doi.org/10.1109/essder.2006.307651

@inproceedings{f948dc0c0054482d9a760a2285099dd2,

title = "Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling",

abstract = "A systematic study to optimize gate stack constituents (interface, high- κ, metal gate) to maximize carrier mobility with aggressively scaled equivalent oxide thickness (EOT) is presented. We identify ultra-thin thermal oxide, atomic layer deposited HfSiON and optimized plasma nitridation performed in sequence as the optimized run path for sub-nm EOT scaling with high carrier mobility. A metal gate deposition process that minimizes the incorporation of impurities in HfSiON is also vital to maintaining good mobility at low EOTs.",

author = "Quevedo-Lopez, {M. A.} and Kirsch, {P. D.} and S. Krishnan and Alshareef, {H. N.} and J. Barnett and Harris, {H. R.} and A. Neugroschel and Aguirre-Tostado, {F. S.} and Gnade, {B. E.} and Kim, {M. J.} and Wallace, {R. M.} and Lee, {B. H.}",

note = "Publisher Copyright: {\textcopyright}2006 IEEE.; ESSDERC 2006 - 36th European Solid-State Device Research Conference ; Conference date: 19-09-2006 Through 21-09-2006",

year = "2006",

doi = "10.1109/essder.2006.307651",

language = "English (US)",

isbn = "1424403014",

series = "ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference",

publisher = "IEEE Computer Society",

pages = "113--116",

booktitle = "ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference",

address = "United States",

}

Quevedo-Lopez, MA, Kirsch, PD, Krishnan, S, Alshareef, HN, Barnett, J, Harris, HR, Neugroschel, A, Aguirre-Tostado, FS, Gnade, BE, Kim, MJ, Wallace, RM & Lee, BH 2006, Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling. in ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference., 4099869, ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference, vol. 2006-January, IEEE Computer Society, pp. 113-116, ESSDERC 2006 - 36th European Solid-State Device Research Conference, Montreux, Switzerland, 09/19/06. https://doi.org/10.1109/essder.2006.307651

Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling. / Quevedo-Lopez, M. A.; Kirsch, P. D.; Krishnan, S. et al.
ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference. IEEE Computer Society, 2006. p. 113-116 4099869 (ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference; Vol. 2006-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Quevedo-Lopez, M. A.

AU - Kirsch, P. D.

AU - Krishnan, S.

AU - Alshareef, H. N.

AU - Barnett, J.

AU - Harris, H. R.

AU - Neugroschel, A.

AU - Aguirre-Tostado, F. S.

AU - Gnade, B. E.

AU - Kim, M. J.

AU - Wallace, R. M.

AU - Lee, B. H.

PY - 2006

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AB - A systematic study to optimize gate stack constituents (interface, high- κ, metal gate) to maximize carrier mobility with aggressively scaled equivalent oxide thickness (EOT) is presented. We identify ultra-thin thermal oxide, atomic layer deposited HfSiON and optimized plasma nitridation performed in sequence as the optimized run path for sub-nm EOT scaling with high carrier mobility. A metal gate deposition process that minimizes the incorporation of impurities in HfSiON is also vital to maintaining good mobility at low EOTs.

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Quevedo-Lopez MA, Kirsch PD, Krishnan S, Alshareef HN, Barnett J, Harris HR et al. Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling. In ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference. IEEE Computer Society. 2006. p. 113-116. 4099869. (ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference). doi: 10.1109/essder.2006.307651

Systematic gate stack optimization to maximize mobility with HfSiON EOT scaling

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