TY - JOUR
T1 - Transistors based on two-dimensional materials for future integrated circuits
AU - Das, Saptarshi
AU - Sebastian, Amritanand
AU - Pop, Eric
AU - McClellan, Connor J.
AU - Franklin, Aaron D.
AU - Grasser, Tibor
AU - Knobloch, Theresia
AU - Illarionov, Yury
AU - Penumatcha, Ashish V.
AU - Appenzeller, Joerg
AU - Chen, Zhihong
AU - Zhu, Wenjuan
AU - Asselberghs, Inge
AU - Li, Lain-Jong
AU - Avci, Uygar E.
AU - Bhat, Navakanta
AU - Anthopoulos, Thomas D.
AU - Singh, Rajendra
N1 - KAUST Repository Item: Exported on 2021-11-30
Acknowledgements: The work of S.D. was supported by the National Science Foundation (NSF) through a CAREER Award under grant no. ECCS-2042154. A.D.F. acknowledges funding support from NSF ECCS-1915814. W.Z. acknowledges funding support from Semiconductor Research Corporation (SRC) under grant SRC 2021-LM-3042 and National Science Foundation under grant ECCS 16-53241 CAR. R.S. acknowledges Nanoscale Research Facility (NRF), IIT Delhi, and the Ministry of Education (MoE) for partial funding supportfrom the Grand Challenge Project 'MBE Growth of 2D Materials' under grant number MI01800G. T.G., T.K. and Y.I. thank the financial support through FWF grants I2606-N30 and I4123-N30. Y.I. also acknowledges the support by the Ministry of Science and Higher Education of the Russian Federation (project 075-15-2020-790) and the Take-off programme of the Austrian Research Promotion Agency FFG (projects 867414 and 861022).
PY - 2021/11/25
Y1 - 2021/11/25
N2 - Field-effect transistors based on two-dimensional (2D) materials have the potential to be used in very large-scale integration (VLSI) technology, but whether they can be used at the front end of line or at the back end of line through monolithic or heterogeneous integration remains to be determined. To achieve this, multiple challenges must be overcome, including reducing the contact resistance, developing stable and controllable doping schemes, advancing mobility engineering and improving high-κ dielectric integration. The large-area growth of uniform 2D layers is also required to ensure low defect density, low device-to-device variation and clean interfaces. Here we review the development of 2D field-effect transistors for use in future VLSI technologies. We consider the key performance indicators for aggressively scaled 2D transistors and discuss how these should be extracted and reported. We also highlight potential applications of 2D transistors in conventional micro/nanoelectronics, neuromorphic computing, advanced sensing, data storage and future interconnect technologies.
AB - Field-effect transistors based on two-dimensional (2D) materials have the potential to be used in very large-scale integration (VLSI) technology, but whether they can be used at the front end of line or at the back end of line through monolithic or heterogeneous integration remains to be determined. To achieve this, multiple challenges must be overcome, including reducing the contact resistance, developing stable and controllable doping schemes, advancing mobility engineering and improving high-κ dielectric integration. The large-area growth of uniform 2D layers is also required to ensure low defect density, low device-to-device variation and clean interfaces. Here we review the development of 2D field-effect transistors for use in future VLSI technologies. We consider the key performance indicators for aggressively scaled 2D transistors and discuss how these should be extracted and reported. We also highlight potential applications of 2D transistors in conventional micro/nanoelectronics, neuromorphic computing, advanced sensing, data storage and future interconnect technologies.
UR - http://hdl.handle.net/10754/673811
UR - https://www.nature.com/articles/s41928-021-00670-1
U2 - 10.1038/s41928-021-00670-1
DO - 10.1038/s41928-021-00670-1
M3 - Article
SN - 2520-1131
VL - 4
SP - 786
EP - 799
JO - Nature Electronics
JF - Nature Electronics
IS - 11
ER -